PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 164

• Manufacturer Part Number: PIC16F913-I/SP
• Description: 28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F913-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F917/916/914/913
FIGURE 14-1:
To enable the serial port, SSPEN bit (SSPCON<5>)
must be set. To reset or reconfigure SPI mode:
• Clear bit SSPEN
• Re-initialize the SSPCON register
• Set SSPEN bit
This configures the SDI, SDO, SCK and SS pins as
serial port pins. For the pins to behave in a serial port
function, they must have their data direction bits (in the
TRISC register) appropriately programmed. This is:
• SDI must have TRISC<7> set
• SDO must have TRISC<4> cleared
• SCK (Master mode) must have TRISC<6>
• SCK (Slave mode) must have TRISC<6> set
• SS must have TRISA<5> set.
DS41250E-page 162
SDO/SEG11
C2OUT/SS/
RC6/TX/CK/
SCK/
RA5/AN2/
SEG9
SEG5
SDA/SEG8
RC4/T1G/
cleared
RC7/RX/
DT/SDI/
SCL/
Peripheral OE
Read
SS Control
Select
TRISC<6>
Edge
bit 0
Enable
Select
Edge
SSPBUF Reg
SSP BLOCK DIAGRAM
(SPI MODE)
SSPSR Reg
SSPM<3:0>
Clock Select
4
2
Write
Prescaler
4, 16, 64
Clock
Shift
TMR2 Output
Data Bus
Internal
2
T
CY
Preliminary
Note 1: When the SPI is in Slave mode with SS
2: If the SPI is used in Slave mode with
3: When the SPI is in Slave mode with SS pin
pin control enabled (SSPCON<3:0> =
0100), the SPI module will reset if the SS
pin is set to V
CKE = 1, then the SS pin control must be
enabled.
control enabled (SSPCON<3:0> = 0100),
the state of the SS pin can affect the state
read back from the TRISC<4> bit. The
peripheral OE signal from the SSP module
into PORTC controls the state that is read
back from the TRISC<4> bit (see
Section 19.4
PIC16F917/916/914/913-I
PIC16F917/916/914/913-E (Extended)”
for
read-modify-write instructions, such as
BSF, are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<4> bit to be set, thus disabling the
SDO output.
information
© 2005 Microchip Technology Inc.
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on
Characteristics:
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