PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 179

• Manufacturer Part Number: PIC16F913-I/SP
• Description: 28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F913-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

15.0
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Both the CCP1 and CCP2 modules are identical in
operation, with the exception being the operation of the
special event trigger. Table 15-1 and Table 15-2 show
the resources and interactions of the CCP module(s).
In the following sections, the operation of a CCP
module is described with respect to CCP1. CCP2
operates the same as CCP1, except where noted.
CCP1 Module:
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will reset Timer1.
TABLE 15-2:
© 2005 Microchip Technology Inc.
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
CAPTURE/COMPARE/PWM
MODULES
Capture
Compare
Compare
PWM
Capture
Compare
INTERACTION OF TWO CCP MODULES
Same TMR1 time base
The compare should be configured for the special event trigger, which clears TMR1
The compare(s) should be configured for the special event trigger, which clears TMR1
The PWMs will have the same frequency and update rate (TMR2 interrupt)
None
None
Preliminary
PIC16F917/916/914/913
CCP2 Module:
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. The special event trigger is
generated by a compare match and will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
Additional information on CCP modules is available in
the “PICmicro
Manual” (DS33023) and in Application Note AN594,
“Using the CCP Modules” (DS00594).
TABLE 15-1:
Interaction
CCP Mode
Compare
Capture
PWM
®
Mid-Range MCU Family Reference
CCP MODE – TIMER
RESOURCES REQUIRED
Timer Resource
DS41250E-page 177
Timer1
Timer1
Timer2