PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 161
PIC16F913-I/SP
Manufacturer Part Number
PIC16F913-I/SP
Description
28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F913-ISP.pdf
(272 pages)
Specifications of PIC16F913-I/SP
A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Quantity
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PIC16F913-I/SP
Manufacturer:
TI
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14.0
The Synchronous Serial Port (SSP) module is a serial
interface used to communicate with other peripheral or
microcontroller devices. These peripheral devices may
be serial EEPROMs, shift registers, display drivers,
A/D converters, etc. The SSP module can operate in
one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
An overview of I
on the SSP module can be found in the “PICmicro
Mid-Range MCU Family Reference Manual” (DS33023).
Refer to Application Note AN578, “Use of the SSP
Module in the Multi-Master Environment” (DS00578).
14.1
This section contains register definitions and operational
characteristics of the SPI module. Additional information
on the SPI module can be found in the “PICmicro
Mid-Range MCU Family Reference Manual” (DS33023).
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS)
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and SSPSTAT<7:6>. These control bits allow the
following to be specified:
• Master mode (SCK is the clock output)
• Slave mode (SCK is the clock input)
• Clock Polarity (Idle state of SCK)
• Clock edge (output data on rising/falling edge of
• Clock Rate (Master mode only)
• Slave Select mode (Slave mode only)
© 2005 Microchip Technology Inc.
SCK)
SSP MODULE OVERVIEW
SPI Mode
2
C operations and additional information
–
–
–
RA5/AN4/C2OUT/SS/SEG5
RC6/TX/CK/SCK/SCL/SEG9
RC7/RX/DT/SDI/SDA/SEG8
–
2
RC4/T1G/SDO/SEG11
C
™
)
Preliminary
®
®
PIC16F917/916/914/913
DS41250E-page 159
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