EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 92
EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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4–32
Software Support for Arria II GX Devices
Document Revision History
Table 4–10. Document Revision History
Arria II GX Device Handbook, Volume 1
July 2010
November 2009
June 2009
February 2009
Date
f
f
Altera provides two distinct methods for implementing various modes of the DSP
block in a design: instantiation and inference. Both methods use the following
Quartus II megafunctions:
■
■
■
■
You can instantiate the megafunctions in the Quartus II software to use the DSP block.
Alternatively, with inference, you can create an HDL design and synthesize it using a
third-party synthesis tool (such as LeonardoSpectrum, Synplify, or Quartus II Native
Synthesis) that infers the appropriate megafunction by recognizing multipliers,
multiplier adders, multiplier accumulators, and shift functions. Using either method,
the Quartus II software maps the functionality to the DSP blocks during compilation.
For instructions about using the megafunctions and the MegaWizard
Manager, refer to the Quartus II Software Help.
For more information, refer to
Handbook.
Table 4–10
Version
LPM_MULT
ALTMULT_ADD
ALTMULT_ACCUM
ALTFP_MULT
3.0
2.0
1.1
1.0
lists the revision history for this chapter.
Updated for the Arria II GX v10.0 release:
■
■
Updated for Arria II GX v9.1 release:
■
■
■
Updated Table 4–1
Initial release
Updated
sections
Minor text edits
Updated Table 4–1 and Table 4–9
Updated Figure 4–9
Minor text edit
“DSP Block Resource Descriptions”
Section III: Synthesis
Changes Made
in volume 1 of the Quartus II
Chapter 4: DSP Blocks in Arria II GX Devices
and
Software Support for Arria II GX Devices
“Second-Stage Adder”
© July 2010 Altera Corporation
™
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