EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 116
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EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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5–24
Figure 5–18. Delay Insertion with VCO Phase Output and Counter Delay Time
Programmable Bandwidth
Spread-Spectrum Tracking
Arria II GX Device Handbook, Volume 1
CLK0
CLK1
CLK2
135
180
225
270
315
45
90
0
1/8 t
VCO
Use the coarse- and fine-phase shifts to implement clock delays in Arria II GX devices.
The ALTPLL megafunction allows you to enter the desired VCO phase taps and initial
counter value settings through the MegaWizard
software.
Arria II GX devices support dynamic phase-shifting of VCO phase taps only. The
phase shift is reconfigurable any number of times and each phase shift takes about
one scanclk cycle, allowing you to implement large phase shifts quickly.
PLL bandwidth is the measure of the ability of the PLL to track the input clock and its
associated jitter. Arria II GX PLLs provide advanced control of the PLL bandwidth
with the PLL loop’s programmable characteristics, including loop filter and charge
pump. The closed-loop gain 3-dB frequency in the PLL determines the PLL
bandwidth. The bandwidth is approximately the unity gain point for open loop PLL
response.
Arria II GX devices can accept a spread-spectrum input with typical modulation
frequencies. However, the device cannot automatically detect that the input is a
spread-spectrum signal. Instead, the input signal looks like deterministic jitter at the
input of the PLL. Arria II GX PLLs can track a spread-spectrum input clock as long as
the input jitter is in the PLL input jitter tolerance specification. Arria II GX devices
cannot internally generate spread-spectrum clocks.
t
d0-1
t
d0-2
t
VCO
Chapter 5: Clock Networks and PLLs in Arria II GX Devices
™
Plug-In Manager in the Quartus II
© July 2010 Altera Corporation
PLLs in Arria II GX Devices
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