EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 158
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EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP2AGX45CU17C6N PDF datasheet
- EP2AGX45CU17C6N PDF datasheet #2
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- EP2AGX45CU17C6N PDF datasheet #5
- EP2AGX190FF35C6N PDF datasheet #6
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6–24
Document Revision History
Table 6–7. Document Revision History
Arria II GX Device Handbook, Volume 1
July 2010
October 2009
June 2009
February 2009
Date
Table 6–7
Version
3.0
2.0
1.1
1.0
lists the revision history for this chapter.
Updated for Arria II GX v10.0 release:
■
■
■
Updated for Arria II GX v9.1 release:
■
■
■
■
■
■
Initial release.
Updated
Updated
Updated
Updated Table 6–2 and Table 6–3.
Updated Figure 6–2, Figure 6–13, and Figure 6–14
Minor text edits.
Updated Table 6–1, Table 6–4 and Table 6–5.
Updated “Programmable Slew Rate Control”, “Programmable Differential Output
Voltage”, “Mini-LVDS”, “RSDS”, “OCT Calibration Block”, and “I/O Placement
Guidelines” sections.
Updated Figure 6–1, Figure 6–6, Figure 6–7, Figure 6–8, Figure 6–9, Figure 6–10,
and Figure 6–14.
Table
Figure
“Overview”
6–4,
6–1.
Table
section.
6–5, and
Changes Made
Table
6–6.
Chapter 6: I/O Features in Arria II GX Devices
© July 2010 Altera Corporation
Document Revision History
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