EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 76
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP2AGX45CU17C6N PDF datasheet
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4–16
Figure 4–8. 9-Bit Independent Multiplier Mode Shown for Half-DSP Block
Arria II GX Device Handbook, Volume 1
1
datab_1[8..0]
dataa_0[8..0]
datab_0[8..0]
dataa_1[8..0]
dataa_2[8..0]
datab_2[8..0]
dataa_3[8..0]
datab_3[8..0]
The multiplier operands can accept signed integers, unsigned integers, or a
combination of both. You can change the signa and signb signals dynamically and
can be registered in the DSP block. Additionally, the multiplier inputs and result can
be registered independently. You can use the pipeline registers in the DSP block to
pipeline the multiplier result, increasing the performance of the DSP block.
The round and saturation logic unit is supported for 18-bit independent multiplier
mode only.
clock[3..0]
ena[3..0]
aclr[3..0]
9
9
9
9
9
9
9
9
Half-DSP Block
signa
signb
Chapter 4: DSP Blocks in Arria II GX Devices
18
18
18
18
© July 2010 Altera Corporation
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Operational Mode Descriptions
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