EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 184
EP2AGX45DF29I5N
Manufacturer Part Number
EP2AGX45DF29I5N
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX45DF29I5N.pdf
(306 pages)
Specifications of EP2AGX45DF29I5N
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
45125
# I/os (max)
364
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
45125
Ram Bits
3565158.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
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- EP2AGX45CU17C6N PDF datasheet
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6–26
Arria II OCT Calibration
Arria II Device Handbook Volume 1: Device Interfaces and Integration
OCT Calibration Block
f
1
Arria II GX devices support calibrated R
calibrated R
the OCT calibration blocks available in the device provided the V
with the pins using calibrated OCT matches the V
calibration block and its associated RUP and RDN pins.
For more information about the location of the OCT calibration blocks in Arria II
devices, refer to the
Pin-Outs.
An OCT calibration block has the same V
R
standards, up to the number of available OCT calibration blocks. You can configure
I/O banks to receive calibrated codes from any OCT calibration block with the same
V
that particular I/O bank has an OCT calibration block.
For example,
voltage. If a group of I/O banks has the same V
calibration block to calibrate the group of I/O banks placed around the periphery.
Because banks 3B, 4C, 6C, and 7B have the same V
all four I/O banks (3B, 4C, 6C, and 7B) with the OCT calibration block (CB7) located
in bank 7A. You can enable this by serially shifting out R
the OCT calibration block located in bank 7A to the I/O banks located around the
periphery.
I/O banks that do not contain calibration blocks share calibration blocks with I/O
banks that do contain calibration blocks.
S
CCIO
OCT calibration is supported on all user I/O banks with different V
. All I/O banks with the same V
S
and R
Figure 6–10
T
Arria II Device Family Connection Guidelines
OCT on all I/O pins. You can calibrate the I/O banks with any of
shows a group of I/O banks that has the same V
CCIO
S
CCIO
can share one OCT calibration block, even if
OCT and Arria II GZ devices support
as the I/O bank that contains the block.
CCIO
CCIO
CCIO
voltage, you can use one OCT
Chapter 6: I/O Features in Arria II Devices
of the I/O bank with the
as bank 7A, you can calibrate
S
OCT calibration codes from
December 2010 Altera Corporation
and
CCIO
Arria II Device
Arria II OCT Calibration
of the I/O bank
CCIO
CCIO
voltage
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