EP3C16Q240C8N Altera, EP3C16Q240C8N Datasheet - Page 110

IC CYCLONE III FPGA 16K 240PQFP

EP3C16Q240C8N

Manufacturer Part Number
EP3C16Q240C8N
Description
IC CYCLONE III FPGA 16K 240PQFP
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C16Q240C8N

Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
160
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
92
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2458

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6–10
On-Chip Series Termination Without Calibration
Cyclone III Device Handbook, Volume 1
Figure 6–4
the associated OCT calibration circuitry.
Figure 6–4. Cyclone III Device Family On-Chip Series Termination with Calibration Setup
RUP and RDN pins go to a tri-state condition when calibration is completed or not
running. These two pins are dual-purpose I/Os and function as regular I/Os if you
do not use the calibration circuit.
The Cyclone III device family supports driver impedance matching to the impedance
of the transmission line, which is typically 25 Ω or 50 Ω. When used with the output
drivers, OCT sets the output driver impedance to 25 Ω or 50 Ω. The Cyclone III device
family also supports I/O driver series termination (R
SSTL-18.
shows the external calibration resistors setup on the RUP and RDN pins and
Cyclone III Device Family OCT with
Calibration with RUP and RDN pins
Calibration
Circuitry
OCT
V
CCIO
Chapter 6: I/O Features in the Cyclone III Device Family
RUP
RDN
S
= 50 Ω) for SSTL-2 and
V
GND
CCIO
© December 2009 Altera Corporation
External
Calibration
Resistor
External
Calibration
Resistor
OCT Support

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