ADV7341BSTZ Analog Devices Inc, ADV7341BSTZ Datasheet - Page 8

no-image

ADV7341BSTZ

Manufacturer Part Number
ADV7341BSTZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7341BSTZ

Number Of Dac's
6
Adc/dac Resolution
12b
Screening Level
Industrial
Package Type
LQFP
Pin Count
64
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7341BSTZ
Manufacturer:
ADI
Quantity:
624
Part Number:
ADV7341BSTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADV7341BSTZ-3
Manufacturer:
ADI
Quantity:
300
Part Number:
ADV7341BSTZ-3
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADV7340/ADV7341
DIGITAL TIMING SPECIFICATIONS—3.3 V
V
All specifications T
Table 8.
Parameter
VIDEO DATA AND VIDEO CONTROL PORT
PIPELINE DELAY
1
2
3
4
5
SD = standard definition, ED = enhanced definition (525p/625p), HD = high definition, SDR = single data rate, DDR = dual data rate.
Video data: C[9:0], Y[9:0], and S[9:0].
Video control: P_HSYNC , P_VSYNC , P_BLANK , S_HSYNC , and S_VSYNC .
Guaranteed by characterization.
Guaranteed by design.
DD
Data Input Setup Time, t
Data Input Hold Time, t
Control Input Setup Time, t
Control Input Hold Time, t
Control Output Access Time, t
Control Output Hold Time, t
SD
ED
HD
= 1.71 V to 1.89 V. PV
CVBS/YC Outputs (2×)
CVBS/YC Outputs (16×)
Component Outputs (2×)
Component Outputs (16×)
Component Outputs (1×)
Component Outputs (8×)
Component Outputs (1×)
Component Outputs (4×)
1
1
1
5
MIN
to T
12
11
DD
MAX
4
4
12
11
= 1.71 V to 1.89 V. V
4
14
(−40°C to +85°C), unless otherwise noted.
4
4
13
4
2, 3
AA
Conditions
SD
ED/HD-SDR
ED/HD-DDR
ED (at 54 MHz)
SD
ED/HD-SDR
ED/HD-DDR
ED (at 54 MHz)
SD
ED/HD-SDR or ED/HD-DDR
ED (at 54 MHz)
SD
ED/HD-SDR or ED/HD-DDR
ED (at 54 MHz)
SD
ED/HD-SDR, ED/HD-DDR or ED (at 54 MHz)
SD
ED/HD-SDR, ED/HD-DDR or ED (at 54 MHz)
SD oversampling disabled
SD oversampling enabled
SD oversampling disabled
SD oversampling enabled
ED oversampling disabled
ED oversampling enabled
HD oversampling disabled
HD oversampling enabled
= 2.6 V to 3.465 V. V
Rev. A | Page 8 of 108
1
DD_IO
= 2.97 V to 3.63 V.
Min
2.1
2.3
2.3
1.7
1.0
1.1
1.1
1.0
2.1
2.3
1.7
1.0
1.1
1.0
4.0
3.5
Typ
68
67
78
41
40
84
46
44
Max
12
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles

Related parts for ADV7341BSTZ