ADV7341BSTZ Analog Devices Inc, ADV7341BSTZ Datasheet - Page 34

• Manufacturer Part Number: ADV7341BSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7341BSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 12b
• Screening Level: Industrial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

ADV7340/ADV7341
Table 21. Register 0x30
SR7 to
SR0
0x30
1
2
Synchronization can be controlled with a combination of either HSYNC and VSYNC inputs or HSYNC and field inputs, depending on Subaddress 0x34, Bit 6.
See the HD Interlace External P_HSYNC and P_VSYNC Considerations section for more information.
Register
ED/HD Mode
Register 1
Bit Description
ED/HD output
standard
ED/HD input
synchronization
format
ED/HD standard
2
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
10011–11111
6
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
5
Bit Number
Rev. A | Page 34 of 108
4
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
3
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
2
0
1
1
0
0
1
1
0
0
1
0
1
Register Setting
EIA770.2 output,
EIA770.3 output
EIA770.1 output
Output levels for full
input range
Reserved
External HSYNC , VSYNC
and field inputs
Embedded EAV/SAV
codes
SMPTE 293M,
ITU-BT.1358
Nonstandard timing mode
BTA-1004, ITU-BT.1362
ITU-BT.1358
ITU-BT.1362
SMPTE 296M-1,
SMPTE 274M-2
SMPTE 296M-3
SMPTE 296M-4,
SMPTE 274M-5
SMPTE 296M-6.
SMPTE 296M-7,
SMPTE 296M-8
SMPTE 240M
Reserved
Reserved
SMPTE 274M-4,
SMPTE 274M-5
SMPTE 274M-6
SMPTE 274M-7,
SMPTE 274M-8
SMPTE 274M-9
SMPTE 274M-10,
SMPTE 274M-11
ITU-R BT.709-5
Reserved
1
Note
ED
HD
525p at 59.94 Hz
525p at 59.94 Hz
625p at 50 Hz
625p at 50 Hz
720p at 60/59.94 Hz
720p at 50 Hz
720p at 30/29.97 Hz
720p at 25 Hz
720p at 24/23.98 Hz
1035i at 60/59.94 Hz
1080i at 30/29.97 Hz
1080i at 25 Hz
1080p at 30/29.97 Hz
1080p at 25 Hz
1080p at 24/23.98 Hz
1080Psf at 24 Hz
Reset
Value
0x00