ADV7341BSTZ Analog Devices Inc, ADV7341BSTZ Datasheet - Page 48

• Manufacturer Part Number: ADV7341BSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7341BSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 12b
• Screening Level: Industrial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

ADV7340/ADV7341
INPUT CONFIGURATION
The ADV7340/ADV7341 support a number of different input
modes. The desired input mode is selected using Subaddress
0x01, Bits[6:4]. The ADV7340/ADV7341 default to standard
definition only (SD only) on power-up. Table 36 provides an
overview of all possible input configurations. Each input mode
is described in detail in the following sections.
STANDARD DEFINITION ONLY
Subaddress 0x01, Bits[6:4] = 000
Standard definition (SD) YCrCb data can be input in 4:2:2 format.
Standard definition (SD) RGB data can be input in 4:4:4 format.
A 27 MHz clock signal must be provided on the CLKIN_A pin.
Input synchronization signals are provided on the S_HSYNC
and S_VSYNC pins.
8-/10-Bit 4:2:2 YCrCb Mode
Subaddress 0x87, Bit 7 = 0; Subaddress 0x88, Bit 3 = 0
In 8-/10-bit 4:2:2 YCrCb input mode, the interleaved pixel data
is input on Pin S9 to Pin S2/S0 (or Pin Y9 to Pin Y2/Y0, depending
on Subaddress 0x01, Bit 7), with Pin S0/Y0 being the LSB in 10-
bit input mode. The ITU-R BT.601/656 input standard is
supported. Embedded EAV/SAV timing codes are also
supported.
16-/20-Bit 4:2:2 YCrCb Mode
Subaddress 0x87, Bit 7 = 0; Subaddress 0x88, Bit 3 = 1
In 16-/20-bit 4:2:2 YCrCb input mode, Y pixel data is input on
Pin S9 to Pin S2/S0 (or Pin Y9 to Pin Y2/Y0, depending on
Subaddress 0x01, Bit 7); Pin S0/Y0 is the LSB in 20-bit input
mode.
Rev. A | Page 48 of 108
The CrCb pixel data is input on Pin Y9 to Pin Y2/Y0 (or Pin C9 to
Pin C2/C0, depending on Subaddress 0x01, Bit 7), with Pin Y0/C0
being the LSB in 20-bit input mode.
Embedded EAV/SAV timing codes are not supported; therefore,
an external synchronization is needed in this mode.
24-/30-Bit 4:4:4 RGB Mode
Subaddress 0x87, Bit 7 = 1
In 24-/30-bit 4:4:4 RGB input mode, the red pixel data is input on
Pin S9 to Pin S2/S0, the green pixel data is input on Pin Y9 to
Pin Y2/Y0, and the blue pixel data is input on Pin C9 to Pin C2/C0.
The S0, Y0, and C0 pins are the respective bus LSBs in 30-bit
input mode.
Embedded EAV/SAV timing codes are not supported; therefore,
an external synchronization is needed in this mode.
*SELECTED BY SUBADDRESS 0x01, BIT 7.
DECODER
MPEG2
Figure 51. SD Only Example Application
YCrCb
27MHz
10
2
CLKIN_A
S[9:0] OR Y[9:0]*
S_VSYNC,
S_HSYNC
ADV7340/
ADV7341