ADV7341BSTZ Analog Devices Inc, ADV7341BSTZ Datasheet - Page 47

• Manufacturer Part Number: ADV7341BSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7341BSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 12b
• Screening Level: Industrial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Table 34. Register 0xC9 to Register 0xCE
SR7 to
SR0
0xC9
0xCA
0xCB
0xCC
0xCD
0xCE
Table 35. Register 0xE0 to Register 0xF1
SR7 to
SR0
0xE0
0xE1
0xE2
0xE3
0xE4
0xE5
0xE6
0xE7
0xE8
0xE9
0xEA
0xEB
0xEC
0xED
0xEE
0xEF
0xF0
0xF1
1
2
x = Logic 0 or Logic 1.
Macrovision registers are available on the ADV7340 only.
Register
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Macrovision
Register
Teletext control
Teletext request
control
TTX Line Enable 0
TTX Line Enable 1
TTX Line Enable 2
TTX Line Enable 3
2
Bit Description
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
MV control bits
Bit Description
Teletext enable
Teletext request mode
Teletext input pin
select
Reserved
Teletext request falling
edge position control
Teletext request rising
edge position control
Teletext on odd fields
Teletext on odd fields
Teletext on even fields
Teletext on even fields
7
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
7
0
0
0
…
1
1
22
14
22
14
Rev. A | Page 47 of 108
6
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
6
0
0
0
…
1
1
21
13
21
13
5
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
5
0
0
0
…
1
1
20
12
20
12
Bit Number
Bit Number
4
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
4
0
0
1
…
0
1
19
11
19
11
3
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
3
0
0
1
1
0
0
…
1
1
18
10
18
10
1
2
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
2
0
1
0
1
0
0
…
1
1
17
9
17
9
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
1
0
1
0
0
…
1
1
16
8
16
8
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
1
0
1
…
0
1
15
7
15
7
Register Setting
Bits[7:1] must be 0.
Register Setting
Disabled.
Enabled.
Line request signal.
Bit request signal.
S_VSYNC.
P_VSYNC.
C0.
Reserved.
Reserved.
0 clock cycles.
One clock cycle.
…
14 clock cycles.
15 clock cycles.
0 clock cycles.
One clock cycle.
…
14 clock cycles.
15 clock cycles.
Setting any of these bits
to 1 enables teletext on
the line number indicated
by the bit settings.
ADV7340/ADV7341
Reset
Value
0x00
0x00
0x00
0x00
0x00
0x00
Reset
Value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00