SAA7105E/V1/G NXP Semiconductors, SAA7105E/V1/G Datasheet - Page 64

• Manufacturer Part Number: SAA7105E/V1/G
• Description: Video ICs PC-DENC
• Manufacturer: NXP Semiconductors

Specifications of SAA7105E/V1/G

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant
• Other names: SAA7105E/V1/G,557

Philips Semiconductors
Table 112: Characteristics
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
SAA7104E_SAA7105E_2
Product data sheet
Symbol
Data and reference signal output timing
C
t
t
t
t
CVBS and RGB outputs
V
V
V
V
R
B
ILE
DLE
o(h)(gfx)
o(d)(gfx)
o(h)
o(d)
amb
V
o(CVBS)(p-p)
o(VBS)(p-p)
o(C)(p-p)
o(RGB)(p-p)
DAC
o(L)
o(L)
o
lf(DAC)
Minimum value for I
Minimum value for I
Levels refer to pins PD11 to PD0, FSVGC, PIXCLKI, VSVGC, PIXCLKO, CBO, TVD, and HSVGC, being inputs or outputs directly
connected to a graphics controller. Input sensitivity is
voltage
The data is for both input and output direction.
This parameter is arbitrary, if PIXCLKI is looped through the VGC.
Tested with programming IFBP = 1.
If an internal oscillator is used, crystal deviation of nominal frequency is directly proportional to the deviation of subcarrier frequency and
line/field frequency.
B
lf(DAC)
= 0 C to 70 C (typical values excluded); unless otherwise specified.
–
3 dB
1
=
2
V
Parameter
output load capacitance
output hold time to
graphics controller
output delay time to
graphics controller
output hold time
output delay time
output voltage CVBS
(peak-to-peak value)
output voltage VBS
(S-video)
(peak-to-peak value)
output voltage C
(S-video)
(peak-to-peak value)
output voltage R, G, B
(peak-to-peak value)
inequality of output
signal voltages
output load resistance
output signal bandwidth
of DACs
low frequency integral
linearity error of DACs
low frequency
differential linearity error
of DACs
DDD2
--------------------------------------------- -
2 R
is generated on chip.
L
2
2
C
C-bus bit DOWNA = 1.
C-bus bit DOWND = 1.
ext
1
+
…continued
5 pF
with R
Conditions
pins HSVGC, VSVGC, FSVGC and
CBO
pins HSVGC, VSVGC, FSVGC and
CBO
pins TDO, TTXRQ_XCLKO2, VSM
and HSM_CSYNC
pins TDO, TTXRQ_XCLKO2, VSM
and HSM_CSYNC
see
see
see
see
3 dB
L
= 37.5
Table 113
Table 113
Table 113
Table 113
Rev. 02 — 23 December 2005
and C
1
2
V
DDD2
ext
= 20 pF (typical).
+ 100 mV for HIGH and
SAA7104E; SAA7105E
[8]
Min
8
1.5
-
3
-
-
-
-
-
-
-
-
-
-
1
2
V
DDD2
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
100 mV for LOW. The reference
Typ
-
-
-
-
-
1.23
1
0.89
0.7
2
37.5
170
-
-
Digital video encoder
Max
40
-
10
-
25
-
-
-
-
-
-
-
3
1
64 of 78
Unit
pF
ns
ns
ns
ns
V
V
V
V
%
MHz
LSB
LSB