QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 58

• Manufacturer Part Number: QT2032-EKG-1A2
• Manufacturer: Applied Micro Circuits Corporation

Specifications of QT2032-EKG-1A2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

QT2022/32 - Data Sheet: DS3051
8.2.13 Backwards Compatibility Control Pin (LEGACY)
The LEGACY pin is used to revert several key register map definitions to be compatible with the AMCC QT2021
SerDes. When the LEGACY pin is low, the new QT2022/32 register map definitions are used. When high, the
QT2021 definitions are used.
Table 8 lists the register map definition differences affected by the LEGACY pin. Table lists all changes to chip
function affected by the LEGACY pin. The state of the LEGACY pin is shown in MDIO register bit 1.D002h.15.
Table 19: LEGACY Pin Register Map Definition Changes
58
1
2
3
4
5
6
7
8
9
10
11
12
Item
1.9001h.6
1.9001h.7
1.9001h.8
1.9001h.9
1.9003h.4
1.9003h.5
1.9004h.0
1.9004h.3
1.9004h.4
1.9004h.7
1.9004h.8
1.9004h.9
Register
AppliedMicro - Confidential & Proprietary
TXFAULT Enable
0 = disabled (default)
1 = enabled
Laser Output Power Fault Enable
0 = disabled
1 = enabled (default)
Laser Temp Fault Enable
0 = disabled
1 = enabled (default)
Laser Bias Current Fault Enable
0 = disabled
1 = enabled (default)
PMA Receive Local Fault, RO/LH
Defined as: NOT(Receive PLL Lock)
Receive Optical Power Fault, RO
linked to DOM alarm 1.A071h.7:6
PHY_XS Transmit Local Fault, RO/LH
Defined as: NOT(TxXAUI Lane Align)
PCS Transmit Local Fault, RO/LH
Defined as: Transmit FIFO overflow/underflow
error
PMA Transmit Local Fault, RO/LH
Defined as: Transmit PLL not locked
Laser Output Power Fault, RO
linked to DOM alarm 1.A070h.1:0
Laser Temp Fault Enable, RO
linked to DOM alarm 1.A070h.7:6
Laser Bias Current Fault, RO
linked to DOM alarm 1.A070h.3:2
Register Definition
LEGACY = 0
TXFAULT Enable
0 = disabled
1 = enabled (default)
Reserved, RO
Reserved, RO
Reserved, RO
PMA Receive Local Fault, RO/LH
Defined as: NOT(Receive PLL Lock) or
RXLOSB_I==0
Reserved, RO
PHY_XS Transmit Local Fault, RO/LH
Defined as: NOT(TxXAUI CDR lock<3:0>)
PCS Transmit Local Fault, RO/LH
Defined as: NOT(TxXAUI Lane Sync) or NOT
(TxXAUI Lane Align)
PMA Transmit Local Fault, RO/LH
Defined as: (Transmit PLL not locked) OR
(TXFAULT)
Reserved, RO
Reserved, RO
Reserved, RO
Register Definition
LEGACY = 1
Revision 5.11