QT2032-EKG-1A2 Applied Micro Circuits Corporation, QT2032-EKG-1A2 Datasheet - Page 53
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QT2032-EKG-1A2
Manufacturer Part Number
QT2032-EKG-1A2
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet
1.QT2032-EKG-1A2.pdf
(220 pages)
Specifications of QT2032-EKG-1A2
Lead Free Status / RoHS Status
Supplier Unconfirmed
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QT2022/32 - Data Sheet: DS3051
7.4.1 Local Fault Generation
Certain errors on the fiber input prevent delineation of valid data from the incoming WIS frame. These errors
include: Loss of WIS Synchronization, LOF, LOP-P, AIS-P and PLM-P. When any of these errors are detected, the
WIS receive process is unable to extract the payload. To handle this condition, the alarm is propagated to the PCS.
The PCS layer generates a local fault signal embedded in an idle stream to notify the upstream MAC.
The error propagates immediately upon detection. The error propagation terminates within 125 μ s of removal of all
error conditions.
Mask bits are available to prevent each of the 4 alarms from propagating to the PCS. These are located in MDIO
register bits 3.C010h.3:0. The errors will propagate by default.
7.4.2 WIS Alarm Masking
Mask bits are available to prevent alarms detected during reception from generating the expected alarm signal in
the Transmit WIS OH. Mask bits for the following alarms are available: AIS-L/LOS/LOF, LOP-P, AIS-P, LCD-P,
PLM-P, WIS Sync and RDI-L. The mask bits are located in MDIO register bits 3.C010h.10:4. The alarms are
unmasked by default.
Revision 5.11
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