DSPIC33EP256MU806-E/MR Microchip Technology, DSPIC33EP256MU806-E/MR Datasheet - Page 435

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DSPIC33EP256MU806-E/MR

Manufacturer Part Number
DSPIC33EP256MU806-E/MR
Description
64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP256MU806-E/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
12K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 28-5:
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at Reset
bit 15
bit 14
bit 13-12
bit 11-8
bit 7
bit 6
bit 5-4
bit 3-0
OBE
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
R-0
R-1
IBF
IBF: Input Buffer Full Status bit
1 = All writable input buffer registers are full
0 = Some or all of the writable input buffer registers are empty
IBOV: Input Buffer Overflow Status bit
1 = A write attempt to a full input byte register occurred (must be cleared in software)
0 = No overflow occurred
Unimplemented: Read as ‘0’
IBxF: Input Buffer x Status Full bit
1 = Input buffer contains data that has not been read (reading buffer will clear this bit)
0 = Input buffer does not contain any unread data
OBE: Output Buffer Empty Status bit
1 = All readable output buffer registers are empty
0 = Some or all of the readable output buffer registers are full
OBUF: Output Buffer Underflow Status bit
1 = A read occurred from an empty output byte register (must be cleared in software)
0 = No underflow occurred
Unimplemented: Read as ‘0’
OBxE: Output Buffer x Status Empty bit
1 = Output buffer is empty (writing data to the buffer will clear this bit)
0 = Output buffer contains data that has not been transmitted
R/W-0 HS
R/W-0 HS
OBUF
IBOV
PMSTAT: PARALLEL MASTER PORT STATUS REGISTER (SLAVE MODE ONLY)
HS = Hardware Set
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
U-0
Preliminary
HC = Hardware Cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OB3E
IB3F
R-0
R-1
OB2E
IB2F
R-0
R-1
x = Bit is unknown
OB1E
IB1F
R-0
R-1
DS70616E-page 435
OB0E
IB0F
R-0
R-1
bit 8
bit 0

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