DSPIC33EP256MU806-E/MR Microchip Technology, DSPIC33EP256MU806-E/MR Datasheet - Page 169

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DSPIC33EP256MU806-E/MR

Manufacturer Part Number
DSPIC33EP256MU806-E/MR
Description
64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP256MU806-E/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
12K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 9-2:
 2009-2011 Microchip Technology Inc.
bit 4-0
Note 1:
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
2:
3:
4:
This bit is cleared when the ROI bit is set and an interrupt occurs.
This register resets only on a Power-on Reset (POR).
DOZE<2:0> bits can only be written to when the DOZEN bit is clear. If DOZEN = 1, any writes to
DOZE<2:0> are ignored.
The DOZEN bit cannot be set if DOZE<2:0> = 000. If DOZE<2:0> = 000, any attempt by user software to
set the DOZEN bit is ignored.
PLLPRE<4:0>: PLL Phase Detector Input Divider Select bits (also denoted as ‘N1’, PLL prescaler)
11111 = Input divided by 33
00001 = Input divided by 3
00000 = Input divided by 2 (default)
CLKDIV: CLOCK DIVISOR REGISTER
Preliminary
(2)
(CONTINUED)
DS70616E-page 169

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