DSPIC33EP256MU806-E/MR Microchip Technology, DSPIC33EP256MU806-E/MR Datasheet - Page 429

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DSPIC33EP256MU806-E/MR

Manufacturer Part Number
DSPIC33EP256MU806-E/MR
Description
64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP256MU806-E/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
12K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
28.0
FIGURE 28-1:
 2009-2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
Parallel Master Port
2: Some registers and associated bits
PARALLEL MASTER PORT
(PMP)
dsPIC33E
of the dsPIC33EPXXXMU806/810/814
and PIC24EPXXXGU810/814 families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 28. “Parallel
Master Port (PMP)” (DS70576) of the
“dsPIC33E/PIC24E Family Reference
Manual”, which is available from the
Microchip
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES
web
PMA<0>
PMALL
PMA<1>
PMALH
PMA<13:2>
PMA<14>
PMCS1
PMA<15>
PMCS2
PMBE
PMRD
PMRD/PMWR
PMWR
PMENB
PMD<7:0>
PMA<7:0>
PMA<15:8>
site
Preliminary
in
Microcontroller
8-bit Data (with or without multiplexed addressing)
The Parallel Master Port (PMP) module is a parallel
8-bit I/O module, specifically designed to communi-
cate with a wide variety of parallel devices, such as
communication peripherals, LCDs, external memory
devices and microcontrollers. Because the interface
to parallel peripherals varies significantly, the PMP is
highly configurable.
Key features of the PMP module include:
• Eight Data Lines
• Up to 16 Programmable Address Lines
• Up to two Chip Select Lines
• Programmable Strobe Options:
• Address Auto-Increment/Auto-Decrement
• Programmable Address/Data Multiplexing
• Programmable Polarity on Control Signals
• Legacy Parallel Slave Port (PSP) Support
• Enhanced Parallel Slave Support:
• Programmable Wait States
- Individual read and write strobes, or
- Read/Write strobe with enable strobe
- Address support
- 4-byte deep auto-incrementing buffer
Up to 16-bit Address
LCD
Address Bus
Data Bus
Control Lines
Buffer
FIFO
DS70616E-page 429
EEPROM

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