DSPIC33EP256MU806-E/MR Microchip Technology, DSPIC33EP256MU806-E/MR Datasheet - Page 381

• Manufacturer Part Number: DSPIC33EP256MU806-E/MR
• Description: 64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU806-E/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

23.0
The
PIC24EPXXXGU810/814 devices have two ADC
modules, ADC1 and ADC2. The ADC1 module
supports up to 32 analog input channels. The ADC2
module supports up to 16 analog input channels.
On ADC1, the AD12B bit (AD1CON1<10>) allows each
of the ADC modules to be configured by the user as
either a 10-bit, 4 Sample and Hold (S&H) ADC (default
configuration) or a 12-bit, 1 S&H ADC.
The ADC2 module only supports 10-bit operation with
4 S&H.
 2009-2011 Microchip Technology Inc.
Note:
Note 1: This data sheet summarizes the features
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
2: Some registers and associated bits
10-BIT/12-BIT ANALOG-TO-
DIGITAL CONVERTER (ADC)
dsPIC33EPXXXMU806/810/814
The ADC1 module needs to be disabled
before modifying the AD12B bit.
of the dsPIC33EPXXXMU806/810/814
and PIC24EPXXXGU810/814 families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 16. “Analog-to-
Digital Converter (ADC)” (DS70621) of
the “dsPIC33E/PIC24E Family Refer-
ence Manual”, which is available from the
Microchip
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
web
site
and
Preliminary
in
23.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 32 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned,
• Operation during CPU Sleep and Idle modes
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only one S&H amplifier in the 12-bit
Depending on the particular device pinout, the ADC
can have up to 32 analog input pins, designated AN0
through AN31. In addition, there are two analog input
pins for external voltage reference connections. These
voltage reference inputs can be shared with other ana-
log input pins. The actual number of analog input pins
and external voltage reference input configuration
depends on the specific device.
A block diagram of the ADC module is shown in
Figure
ADC conversion clock period.
pins
fractional/integer)
up to 500 ksps are supported
configuration, so simultaneous sampling of
multiple channels is not supported.
23-1.
Key Features
Figure 23-2
provides a diagram of the
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