DSPIC33EP256MU806-E/MR Microchip Technology, DSPIC33EP256MU806-E/MR Datasheet - Page 252

• Manufacturer Part Number: DSPIC33EP256MU806-E/MR
• Description: 64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU806-E/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
FIGURE 13-1:
FIGURE 13-2:
DS70616E-page 252
TxCK
Note 1: F
TxCK
2: The ADC trigger is available on TMR3 and TMR5 only.
Note 1: F
P
is the peripheral clock.
P
TCKPS<1:0>
F
is the peripheral clock.
Prescaler
P (1)
TYPE B TIMER BLOCK DIAGRAM (x = 2, 4, 6, AND 8)
TYPE C TIMER BLOCK DIAGRAM (x = 3, 5, 7, AND 9)
(/n)
F
TCKPS<1:0>
Prescaler
TCKPS<1:0>
P
(1)
Prescaler
(/n)
Sync
Gate
(/n)
TCKPS<1:0>
Prescaler
Gate
Sync
(/n)
Sync
Sync
Falling Edge
Detect
Preliminary
TGATE
Falling Edge
TCS
Detect
TGATE
TCS
10
00
x1
10
00
x1
Comparator
TMRx
PRx
Comparator
TxCLK
TMRx
PRx
TxCLK
Equal
Reset
 2009-2011 Microchip Technology Inc.
Equal
Reset
1
0
TGATE
Set TxIF flag
Latch
1
0
TGATE
CLK
Set TxIF flag
Latch
Conversion Trigger
ADC Start of
Data
CLK
Data
(2)