ADAU1445YSVZ-3A-RL Analog Devices Inc, ADAU1445YSVZ-3A-RL Datasheet - Page 4

• Manufacturer Part Number: ADAU1445YSVZ-3A-RL
• Description: 175MHZ SigmaDSP,2x8 SRCs
• Manufacturer: Analog Devices Inc
• Series: SigmaDSP®r
• Type: Audio Processorr

Specifications of ADAU1445YSVZ-3A-RL

• Applications: Automotive Audio
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Format: Fixed Point
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADAU1445/ADAU1446
SPECIFICATIONS
AVDD = 3.3 V, DVDD = 1.8 V, PVDD = 3.3 V, IOVDD = 3.3 V, T
unless otherwise noted.
Table 1.
Parameter
ANALOG PERFORMANCE
DIGITAL I/O
POWER
Auxiliary Analog Inputs
Input Voltage, High (V
Input Voltage, Low (V
Input Leakage, High (I
Input Leakage, Low (I
High Level Output Voltage (V
Low Level Output Voltage (V
Input Capacitance (C
Multipurpose Pins Output Drive
Supply Voltage
Supply Current
Resolution
Full-Scale Analog Input
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Gain Error
Input Impedance
Sample Rate
Analog Voltage (AVDD)
Digital Voltage (DVDD)
PLL Voltage (PVDD)
IOVDD Voltage (IOVDD)
Analog Current (AVDD)
PLL Current (PVDD)
I/O Current (IOVDD)
Minimum Digital Current (DVDD) of
ADAU1445
2
i
IL
)
IL
IH
IH
) at 0 V
)
)
) at 3.3 V
OL
OH
)
)
Min
−2.3
−2.0
−2.0
0.7 × IOVDD
−2
−2
60
−85
−2
−8
−140
0.85 × IOVDD
2
2.97
1.62
2.97
2.97
Rev. A | Page 4 of 92
A
= 25°C, master clock input = 12.288 MHz, core clock f
Typ
10
AVDD
200
f
5
3.3
1.8
3.3
3.3
2
10
10
100
CORE
/896
Max
+2.3
+2.0
+2.0
0.3 × IOVDD
+2
+8
140
−10
+2
+2
−60
0.1 × IOVDD
6
3.63
1.98
3.63
3.63
Unit
Bits
V
LSB
LSB
LSB
kΩ
kHz
V
V
μA
μA
μA
μA
μA
μA
μA
V
V
pF
mA
V
V
V
V
mA
mA
mA
mA
Test Conditions/Comments
4:1 multiplexed input, each
channel at f
f
channel is sampled at 48 kHz.
Digital input pins except
SPDIFI.
Digital input pins except
SPDIFI.
Digital input pins except
MCLK and SPDIFI.
MCLK.
SPDIFI.
All other pins.
CLKMODEx, RSVD, PLLx,
RESET.
MCLK.
SPDIFI.
I
I
Guaranteed by design.
These pins are not designed
for static current draw and
should not drive LEDs directly.
Depends greatly on the num-
ber of active serial ports, clock
pins, and characteristics of
external loads.
Minimal program loaded,
one serial port active, no
ASRCs active.
OH
OL
CORE
= 1 mA.
= 1 mA.
= 172.032 MHz, each
CORE
1
1
= 172.032 MHz,
CORE
/3584. For