S1D13700F01A100 Epson, S1D13700F01A100 Datasheet - Page 53
S1D13700F01A100
Manufacturer Part Number
S1D13700F01A100
Description
Display Drivers LCD CONTROLLER
Manufacturer
Epson
Datasheet
1.S1D13700F01A100.pdf
(266 pages)
Specifications of S1D13700F01A100
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFP
Pin Count
80
Mounting
Surface Mount
Operating Supply Voltage (min)
2.7V
Lead Free Status / Rohs Status
Supplier Unconfirmed
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8: REGISTERS
8 R
8.1 Register Mapping
8.2 Register Descriptions
1-44
REG[00h] Revision Code Register
Address = 1FFE0h
REG[01h] Mode Register 0
Address = 1FFE1h
Product Code
TFT/STN
Bit 5
The S1D13705 registers are located in the upper 32 bytes of the 128K byte S1D13705 address
range. The registers are accessible when CS# = 0 and AB[16:0] are in the range 1FFE0h through
1FFFFh.
Unless specified otherwise, all register bits are reset to 0 during power up.
All bits marked n/a should be programmed 0.
bits 7-2
bits 1-0
bit 7
bit 6
bit 5
bit 4
bit 3
EGISTERS
Product Code
Dual/Single
Product Code
This is a read-only register that indicates the product code of the chip. The product code is
001001.
Revision Code
This is a read-only register that indicates the revision code of the chip. The revision code
is 00.
TFT/STN
When this bit = 0, STN (passive) panel mode is selected. When this bit = 1, TFT/D-TFD
panel mode is selected. If TFT/D-TFD panel mode is selected, Dual/Single (REG[01h]
bit 6) and Color/Mono (REG[01h] bit5) are ignored. See Table 8-1 for a comprehensive
description of panel selection.
Dual/Single
When this bit = 0, Single LCD panel drive is selected. When this bit = 1, Dual LCD panel
drive is selected. See Table 8-1 for a comprehensive description of panel selection.
Color/Mono
When this bit = 0, Monochrome LCD panel drive is selected. When this bit = 1, Color
LCD panel drive is selected. See Table 8-1 for a comprehensive description of panel
selection.
FPLINE Polarity
This bit controls the polarity of FPLINE in TFT/D-TFD mode (no effect in passive panel
mode). When this bit = 0, FPLINE is active low. When this bit = 1, FPLINE is active high.
FPFRAME Polarity
This bit controls the polarity of FPFRAME in TFT/D-TFD mode (no effect in passive
panel mode). When this bit = 0, FPFRAME is active low. When this bit = 1, FPFRAME is
active high.
Bit 4
Product Code
Color/Mono
Bit 3
FPLine Polar-
Product Code
Bit 2
ity
EPSON
Product Code
FPFrame
Polarity
Bit 1
Product Code
FPSHIFT
Mask
Bit 0
S1D13705F00A HARDWARE FUNCTIONAL
SPECIFICATION (X27A-A-001-06)
Revision Code
Data Width
Bit 1
Bit 1
Revision Code
Data Width
Read/Write.
Read Only.
Bit 0
Bit 0
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