S1D13700F01A100 Epson, S1D13700F01A100 Datasheet - Page 245
S1D13700F01A100
Manufacturer Part Number
S1D13700F01A100
Description
Display Drivers LCD CONTROLLER
Manufacturer
Epson
Datasheet
1.S1D13700F01A100.pdf
(266 pages)
Specifications of S1D13700F01A100
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFP
Pin Count
80
Mounting
Surface Mount
Operating Supply Voltage (min)
2.7V
Lead Free Status / Rohs Status
Supplier Unconfirmed
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7: INTERFACING TO THE NEC VR4102/VR4111 MICROPROCESSOR
7 I
7.1 Introduction
7.2 Interfacing to the NEC VR4102/VR4111
The NEC VR4102/VR4111 System Bus
Overview
5-44
VR4111 M
This application note describes the hardware required to interface the S1D13705 Embedded
Memory LCD Controller and the NEC VR4102/VR4111 Microprocessor (µPD30102). The NEC
VR4102/VR4111 Microprocessor is specifically designed to support an external LCD controller and
the pairing of these two devices results in an embedded system offering impressive display
capability with very low power consumption.
The VR-Series family of microprocessors features a high-speed synchronous system bus typical of
modern microprocessors. Designed with external LCD controller support and Windows CE-based
embedded consumer applications in mind, the VR4102/VR4111 offers a highly integrated solution
for portable systems. This section is an overview of the operation of the CPU bus to establish
interface requirements.
The NEC VR4102/VR4111 is designed around the RISC architecture developed by MIPS. This
microprocessor is designed around the 66MHz VR4100 CPU core which supports 64-bit processing.
The CPU communicates with the Bus Control Unit (BCU) with its internal SysAD bus. The BCU in
turn communicates with external devices with its ADD and DAT buses that can be dynamically sized
to 16 or 32-bit operation.
The NEC VR4102/VR4111 has direct support for an external LCD controller. Specific control
signals are assigned for an external LCD controller that provide an easy interface to the CPU. A 16M
byte block of memory is assigned for the LCD controller with its own chip select and ready signals
available. Word or byte accesses are controlled by the system high byte signal, SHB#.
X27A-G-008-01
NTERFACING TO THE
ICROPROCESSOR
EPSON
NEC VR4102/
S1D13705F00A APPLICATION NOTES
(X27A-G-008-01)
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