S1D13700F01A100 Epson, S1D13700F01A100 Datasheet
S1D13700F01A100
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S1D13700F01A100 Summary of contents
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MF1213-02 Embedded Memory LCD Controller S1D13705F00A Technical Manual ...
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... Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as medical products ...
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... The information of the product number change Starting April 1, 2001, the product number will be changed as listed below. To order from April 1, 2001 please use the new product number. For further information, please contact Epson sales representative. Configuration of product number Devices S1 D 13706 Evaluation Board ...
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S1D13705F00A Technical Manual HARDWARE FUNCTIONAL SPECIFICATION PROGRAMMING NOTES AND EXAMPLES UTILITIES S5U13705B00C ISA BUS EVALUATION BOARD USER’S MANUAL APPLICATION NOTES ® WINDOWS CE DISPLAY DRIVERS ...
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... Single Color Panel Timing (Format 1) ................................................................1-33 7.3.7 8-Bit Single Color Panel Timing (Format 2) ................................................................1-35 7.3.8 8-Bit Dual Monochrome Panel Timing ........................................................................1-37 7.3.9 8-Bit Dual Color Panel Timing.....................................................................................1-39 7.3.10 12-Bit TFT/D-TFD Panel Timing .................................................................................1-41 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION CONTENTS D ...........................................................................1-4 IAGRAMS ..................................................................................................1-7 EPSON CONTENTS 1-i ...
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... Software Power Save Mode........................................................................................................ 1-69 13.2 Hardware Power Save Mode ...................................................................................................... 1-69 13.3 Power Save Mode Function Summary........................................................................................ 1-69 13.4 Panel Power Up/Down Sequence............................................................................................... 1-70 13.5 Turning Off BCLK Between Accesses ........................................................................................ 1-70 13.6 Clock Requirements.................................................................................................................... 1- ................................................................................................................1-72 ECHANICAL ATA 1-ii .............................................................................................1-58 EPSON S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION ...
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... Relationship Between The Screen Image and the Image Refreshed by S1D13705 in Default Mode1-64 Figure 12-2 Relationship Between The Screen Image and the Image Refreshed by S1D13705 in Alternate Mode1-66 Figure 13-1 Panel On/Off Sequence .....................................................................................................1-70 Figure 14-1 Mechanical Drawing QFP14...............................................................................................1-72 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION List of Figures EPSON CONTENTS 1-iii ...
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... Power Save Mode Selection .............................................................................................. 1-69 Table 13-2 Software Power Save Mode Summary .............................................................................. 1-69 Table 13-3 Hardware Power Save Mode Summary............................................................................. 1-69 Table 13-4 Power Save Mode Function Summary .............................................................................. 1-69 Table 13-5 S1D13705 Internal Clock Requirements............................................................................ 1-71 1-iv List of Tables EPSON S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION ...
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... Products requiring a “Portrait” display can take advantage of the Hardware Portrait Mode feature of the S1D13705. Virtual and Split Screen are just some of the display modes supported. The above features, combined with the Operating System independence of the S1D13705, make it the ideal solution for a wide variety of applications. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) EPSON 1: INTRODUCTION 1-1 ...
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... Look-Up Tables are used to map 1/2/4/8 bpp modes into these colors. • Split screen display for all landscape panel modes allows two different images to be simulta- neously displayed. • Virtual display support (displays images larger than the panel size through the use of panning). 1-2 EPSON S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... GPIO[4:1] are available if upper LCD data pins (FPDAT[11:8]) are not required for TFT/D- TFD support or hardware inverse video. • Core operates from 2.7 volts to 3.6 volts. • IO Operates from the core voltage up to 5.5 volts. 2.7 Package • 80 pin QFP14 package. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) EPSON 2: FEATURES 1-3 ...
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... DB[15:0] WE1# S1D13705 BS# RD/WR# RD# WE0# WAIT# BCLK RESET# Oscillator CS# AB[16:0] DB[15:0] WE1# S1D13705 BS# RD/WR# RD# WE0# WAIT# BCLK RESET# EPSON FPDAT[7:0] D[7:0] FPSHIFT FPSHIFT 8-bit FPFRAME FPFRAME LCD FPLINE FPLINE Display DRDY MOD LCDPWR FPDAT[7:4] D[3:0] FPSHIFT FPSHIFT 4-bit FPFRAME FPFRAME LCD ...
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... DB[15:0] S1D13705 AB0 WE1# BS# RD/WR# WAIT# BCLK RESET# Oscillator CS# AB[16:0] DB[15:0] WE1# S1D13705 BS# RD/WR# RD# WE0# WAIT# BCLK RESET# EPSON FPDAT[7:4] D[3:0] FPSHIFT FPSHIFT 4-bit FPFRAME FPFRAME LCD FPLINE FPLINE Display DRDY MOD LCDPWR FPDAT[7:0] D[7:0] FPSHIFT FPSHIFT 8-bit FPFRAME FPFRAME LCD ...
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... AB[16:0] DB[15:0] S1D13705 WE0# WE1# RD RD/WR# WAIT# BCLK RESET# Oscillator BS# CS# AB[16:0] DB[15:0] WE0# S1D13705 RD# WE1# WAIT# BCLK RESET# EPSON FPDAT[11:0] D[11:0] FPSHIFT FPSHIFT 12-bit FPFRAME FPFRAME TFT FPLINE FPLINE Display DRDY DRDY LCDPWR FPDAT[8:0] D[8:0] FPSHIFT FPSHIFT 9-bit FPFRAME FPFRAME ...
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... The Look-Up Table contains three 256 4 Look-Up Tables or palettes, one for each primary color. In monochrome mode only the green Look-Up Table is used. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06 LOCK IAGRAM 40k 16-bit SRAM Memory Power Save Controller Clocks Look-Up Table Sequence Controller Memory Clock Pixel Clock EPSON 4: FUNCTIONAL BLOCK DIAGRAM LCD LCD I/F 1-7 ...
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... The LCD Interface performs frame rate modulation for passive LCD panels. It also generates the correct data format and timing control signals for various LCD and TFT/D-TFD panels. 4.1.6 Power Save Power Save contains the power save mode circuitry. 1-8 EPSON S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... AB0 71 BCLK RESET# 74 CS# 75 BS# 76 RD# 77 WE0# 78 WE1# 79 RD/WR Note: Package type: 80 pin surface mount QFP14 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) S1D13705 Figure 5-1 Pinout Diagram EPSON 5: PINS FPFRAME 38 FPLINE 37 FPDAT0 36 FPDAT1 35 FPDAT2 34 FPDAT3 33 FPDAT4 32 FPDAT5 31 FPDAT6 30 FPDAT7 29 IOV DD 28 FPSHIFT ...
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... For Generic #1, this pin inputs the write enable signal for the lower data byte (WE0#). • For Generic #2, this pin inputs the write enable signal (WE#) See Table 5-7, “Host Bus Interface Pin Mapping,” on page 1-13 for summary. EPSON /I in Table 6-4: “Output Specifications,” Table 6-4: “ ...
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... For Generic #2, this pin outputs the wait signal (WAIT#). See Table 5-7, “Host Bus Interface Pin Mapping,” on page 1-13 for summary. Active low input to set all internal registers to the default state and force all signals to their inactive states. EPSON 5: PINS Description . ...
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... Pulled low Test Enable input. This input must be connected to V Table 5-5 Power Supply Pin Descriptions Pin # Driver 1, 21, 41, P Core 10, 29 20, 27, 40, Common V 50, 60, 72 EPSON Description when unused. See DD when unused. See DD Description Description Description S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... D[31:16] UDS# DS# External Decode External Decode External Decode CLK CLK AS# AS# R/W# R/W# connect SIZ1 DD connect SIZ0 DD DTACK# DSACK1# RESET# RESET# EPSON 5: PINS 0 Little Endian Generic #1 Generic #2 A[16:1] A[16: D[15:0] D[15:0] WE1# BHE# External Decode BCLK BCLK connect to V connect RD1# ...
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... GPIO1 GPIO2 GPIO2 GPIO2 GPIO3 GPIO3 GPIO3 GPIO4/ GPIO4/ GPIO4/ GPIO4/ Hardware Hardware Hardware Hardware Video Video Video Invert Invert Invert . DD EPSON Color TFT/D-TFD 8-bit Dual 9-bit 12-bit MOD MOD DRDY D0 LD0 R2 D1 LD1 R1 D2 LD2 R0 D3 LD3 G2 D4 UD0 G1 D5 ...
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... DD 3.3 5 3.0 1.9 DD 3.3 2.0 3.5 5 3.0 1.0 DD 3.3 1.1 5.0 2 3.0 0.5 DD 0.6 3.3 0.8 5 Max EPSON 6: D.C. CHARACTERISTICS Units °C °C = 3.3V ± 10% DD Typ. Max. Units 3.0/3.3 3.6 V 3.0/3.3/5.0 5 °C Typ. Max. Units 0.8 V 0 2 ...
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... Output Leakage Current OZ C Output Pin Capacitance OUT Bidirectional Pin Capaci- C BID tance 1-16 Table 6-4 Output Specifications Condition Min 3. 0.4V, Type = 3. 0.4V, Type = 5. 0.4V, Type = 3. 0.4V,Type = 3. 0.4V,Type = 5. 0.4V,Type = 0 Max EPSON Typ. Max. Units -12 0 µ S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... Note: The SH-4 Wait State Control Register for the area in which the S1D13705 resides must be set to a non-zero value. The SH-4 read-to-write cycle transition must be set to a non-zero value (with reference to BUSCLK). S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) t10 t13 t15 t17 Figure 7-1 SH-4 Timing EPSON 7: A.C. CHARACTERISTICS t5 t11 t14 t16 Hi-Z t18 Hi-Z VALID ...
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... Rising edge RD# to DB[15:0] high impedance (read cycle) Note: CKIO may be turned off (held low) between accesses - see Section 13.5 “Turning Off BCLK Between Accesses” on page 1-70. 1-18 Table 7-1 SH-4 Timing Parameter EPSON Min. Max. Units 50 MHz 1/f ...
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... Note: CKIO may be turned off (held low) between accesses - see Section 13.5 “Turning Off BCLK Between Accesses” on page 1-70. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) t13 t14 t16 Figure 7-2 SH-3 Bus Timing Table 7-2 SH-3 Bus Timing Parameter EPSON 7: A.C. CHARACTERISTICS t5 t11 t10 Hi-Z t15 Hi-Z t17 Hi-Z VALID Min ...
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... Note: CKIO may be turned off (held low) between accesses - see Section 13.5 “Turning Off BCLK Between Accesses” on page 1-70. 1-20 VALID t11 t10 Hi-Z VALID Figure 7-3 MC68K #1 Bus Timing (MC68000) Table 7-3 MC68K #1 Bus Timing (MC68000) Parameter EPSON Hi-Z t9 Hi-Z VALID t12 Hi-Z Min. Max. 33 1/f ...
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... Note: CKIO may be turned off (held low) between accesses - see Section 13.5 “Turning Off BCLK Between Accesses” on page 1-70. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) VALID VALID t10 VALID Figure 7-4 MC68K #2 Timing (MC68030) Table 7-4 MC68K #2 Timing (MC68030) Parameter EPSON 7: A.C. CHARACTERISTICS Hi-Z t9 Hi-Z t11 Hi-Z Min. Max. Units 33 ...
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... Note: CKIO may be turned off (held low) between accesses - see Section 13.5 “Turning Off BCLK Between Accesses” on page 1-70. 1-22 VALID VALID t6 t9 Figure 7-5 Generic #1 Timing Table 7-5 Generic #1 Timing Parameter EPSON Hi-Z VALID t10 Hi-Z t11 Min. Max. ...
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... Note: CKIO may be turned off (held low) between accesses - see Section 13.5 “Turning Off BCLK Between Accesses” on page 1-70. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) VALID VALID t6 t9 Figure 7-6 Generic #2 Timing Table 7-6 Generic #2 Timing Parameter 1 EPSON 7: A.C. CHARACTERISTICS Hi-Z VALID t10 Hi-Z t11 Min. Max. Units ...
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... Input Clock Fall Time (10 Input Clock Rise Time (10% - 90%) r Note: When CLKI is > 25MHz it must be divided by 2 (REG[02h] bit 4 = 1). 1-24 t PWH CLKI Figure 7-7 Clock Input Requirements Table 7-7 Clock Input Requirements Parameter Min. 1/f EPSON t PWL Max. Units 0 50 MHz CLKI ...
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... FPLINE, FPFRAME, FPSHIFT, FPDAT, DRDY active to LCDPWR Note: Where T is the period of FPFRAME and T FPFRAME S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06 Table 7-8 LCD Panel Power On/Reset Timing is the period of the pixel clock. PCLK EPSON 7: A.C. CHARACTERISTICS ACTIVE t2 Min. Typ. Max. T FPFRAME 0 Frames Units ...
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... HW Power Save inactive to FPLINE, FPFRAME, FPSHIFT, FPDAT, DRDY, t5 LCDPWR active - LCDPWR Override = 0 t6 LCDPWR Override active (1) to LCDPWR inactive t7 LCDPWR Override inactive (1) to LCDPWR active 1- Inactive Active Figure 7-9 Power Down/Up Timing Table 7-9 Power Down/Up Timing Parameter EPSON Inactive Active t7 Min. Typ. Max. Units 1 Frame 1 Frame 1 Frame ...
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... S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) VDP LINE2 LINE3 LINE4 LINE239 LINE240 HDP 1-5 1-6 1-7 1-8 = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE1 LINE2 HNDP 1-317 1-318 1-319 1-320 8Ts 8Ts 1-27 ...
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... Parameter 8 + ((REG[08h] bits 4- 2] 11]Ts EPSON t14 t11 t10 t12 t13 1 2 Min. Typ. Max. Units note 2 (note note ...
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... LINE3 LINE4 LINE479 LINE480 HDP 1-9 1-10 1-11 1-12 1-13 1-14 1-15 1-16 = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE1 LINE2 HNDP 1-633 1-634 1-635 1-636 1-637 1-638 1-639 1-640 8Ts ...
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... Min. note 2 9 note note 4 note 5 t14 + ((REG[08h] bits 4- 4] 13]Ts EPSON S1D13705F00A HARDWARE FUNCTIONAL t11 t10 t12 t13 1 2 Typ. Max. Units (note 8]Ts SPECIFICATION (X27A-A-001-06) ...
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... LINE3 LINE4 LINE239 LINE240 HDP 1-B3 1-R4 1-G4 1-B4 Figure 7-14 4-Bit Single Color Panel Timing = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE1 LINE2 HNDP 1-B319 1-R320 1-G320 1-B320 8Ts 8Ts ...
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... Line Pulse falling edge to Shift Pulse rising edge pixel clock period 9Ts min min [((REG[04h] bits 6-0)+1) min [(REG[08h] bits 4-0) min [(REG[08h] bits 4-0) min 1- Parameter 8 + ((REG[08h] bits 4- 0.5] 9.5]Ts EPSON t14 t11 t10 t12 t13 1 2 Min. Typ. Max. Units note 2 (note note ...
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... REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE1 LINE2 HNDP 1-R636 1-B636 1-G637 1-R638 1-B638 1-G639 1-R640 1-B640 8Ts 8Ts ...
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... Parameter 8 + ((REG[08h] bits 4- t13 - t10] t13] 11] 11] - t10]Ts EPSON t14 t11 t10 t12 t13 t12 t13 1 2 Min. Typ. Max. Units note 2 (note note 3 ...
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... LINE3 LINE4 LINE479 LINE480 HDP 1-G6 1-B6 1-R7 1-G7 1-B7 1-R8 1-G8 1-B8 = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE1 LINE2 HNDP 1-G638 1-B638 1-R639 1-G639 1-B639 1-R640 1-G640 1-B640 8Ts ...
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... Line Pulse falling edge to Shift Pulse rising edge pixel clock period 9Ts min min [((REG[04h] bits 6-0)+1) min [(REG[08h] bits 4-0) min [(REG[08h] bits 4-0) min 1- Parameter 8 + ((REG[08h] bits 4- 1] 10]Ts EPSON t14 t11 t10 t12 t13 1 2 Min. Typ. Max. Units note 2 (note note ...
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... LINE 239/479 LINE 240/480 HDP 1-5 1-6 1-7 1-8 241-5 241-6 241-7 241-8 = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE 1/241 LINE 2/242 HNDP 1-637 1-638 1-639 1-640 241-637 241-638 241-639 ...
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... Line Pulse falling edge to Shift Pulse rising edge pixel clock period 9Ts min min [(((REG[04h] bits 6-0)+1) min [((REG[08h] bits 4- min [((REG[08h] bits 4- min 1- Parameter 8 + ((REG[08h] bits 4- 20] 29]Ts EPSON t14 t11 t10 t12 t13 1 2 Min. Typ. Max. Units note 2 (note note ...
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... Figure 7-22 8-Bit Dual Color Panel Timing = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = REG[0Ah] bits 5-0 Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VNDP LINE 1/241 HNDP 1-B639 1-R640 1-G640 1-B640 241- B639 241- ...
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... Table 7-16 8-Bit Dual Color Panel A.C. Timing Parameter 8 + ((REG[08h] bits 4- 17] 26]Ts EPSON t14 t11 t10 t12 t13 1 2 Min. Typ. Max. Units note 2 (note note 3 9 ...
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... HDP HNDP 2 1-1 1-2 1-1 1-2 1-1 1-2 Figure 7-24 12-Bit TFT/D-TFD Panel Timing = (REG[06h] bits 1-0, REG[05h] bits 7- Lines = VNDP1 + VNDP2 = (REG[0Ah] bits 5-0) Lines = ((REG[04h] bits 6- EPSON 7: A.C. CHARACTERISTICS VDP VNDP 1 LINE480 HNDP 1 1-640 1-640 1-640 8Ts 8Ts 8) +16Ts ...
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... A.C. CHARACTERISTICS Frame Pulse Line Pulse Line Pulse DRDY Shift Pulse FPDAT[11:0] Note: DRDY is used to indicate the first pixel 1- t12 t7 t17 t11 Figure 7-25 TFT/D-TFD A.C. Timing EPSON t6 t15 t14 t13 t16 639 640 t10 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) Table 7-17 TFT/D-TFD A.C. Timing Parameter Min. 1 0.5 0.5 0.5 0.5 note 2 9 note 3 2t6 note 4 0 18Ts 0.5 note 5 note 6 0.5 note ((REG[08h] bits 4-0)+ 16 16] Ts EPSON 7: A.C. CHARACTERISTICS Typ. Max. Units (note 250 8] Ts 1-43 ...
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... When this bit = 0, FPFRAME is active low. When this bit = 1, FPFRAME is active high. 1-44 Product Code Product Code Product Code Bit 2 Bit 1 Bit 0 FPLine Polar- FPFrame Mask ity Polarity FPSHIFT EPSON S1D13705F00A HARDWARE FUNCTIONAL Read Only. Revision Code Revision Code Bit 1 Bit 0 Read/Write. Data Width Data Width Bit 1 Bit 0 SPECIFICATION (X27A-A-001-06) ...
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... Bit-Per-Pixel Bit 0 REG[02h] bit 7 REG[02h] bit EPSON 8: REGISTERS Function Mono Single 4-bit passive LCD Mono Single 8-bit passive LCD reserved reserved reserved Mono Dual 8-bit passive LCD reserved reserved Color Single 4-bit passive LCD reserved reserved Color Dual 8-bit passive LCD ...
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... X X Table 8-4 Inverse Video Mode Select Options Software Video Invert (Passive and Active Panels) (Passive Panels Only EPSON S1D13705F00A HARDWARE FUNCTIONAL Display Modes MClk = PClk/8 1 bit-per-pixel MClk = PClk/4 2 bit-per-pixel MClk = PClk/2 4 bit-per-pixel MClk = PClk 8 bit-per-pixel MClk = PClk FPDAT11 Video Data X Normal ...
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... Normal Operation Horizontal Horizontal Horizontal Panel Size Bit Panel Size Bit Panel Size Bit 4 3 Horizontal Panel Resolution (pixels) = --------------------------------------------------------------------------------------- EPSON 8: REGISTERS Read/Write Hardware Software Software Power Save Bit Power Save Bit Enable 1 0 GPIO0 Operation X GPIO0 Input (high impedance) 0 ...
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... FPLINE Start FPLINE Start Position Bit 4 Position Bit 3 Position Bit 2 = REG 07h + REG 08h Horizontal Horizontal Non-Display Non-Display Period Bit 4 Period Bit 3 = EPSON Read/Write Vertical Panel Vertical Panel Size Size Size Bit 2 Bit 1 Bit 0 Read/Write Vertical Panel Vertical Panel n/a Size Size ...
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... Vertical Non- Vertical Non- Display Period Display Period Display Period Bit 4 Bit 3 = REG[0Ah] bits [5:0] MOD Rate MOD Rate MOD Rate Bit 4 Bit 3 EPSON 8: REGISTERS Read/Write FPFRAME FPFRAME Start Position Start Position Bit 2 Bit 1 Bit 0 Read/Write Vertical Non- Vertical Non- Display Period ...
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... Address Bit 4 Bit 3 Bit 2 Screen 2 Start Screen 2 Start Screen 2 Start Address Address Address Bit 12 Bit 11 Bit 10 n/a n/a n/a EPSON S1D13705F00A HARDWARE FUNCTIONAL Read/Write Screen 1 Start Screen 1 Start Address Address Bit 1 Bit 0 Read/Write Screen 1 Start Screen 1 Start Address Address Bit 9 Bit 8 ...
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... Bit 4 set Bit 3 set Bit 2 Screen 1 Verti- Screen 1 Verti- Screen 1 Verti- cal Size Bit 4 cal Size Bit 3 cal Size Bit 2 n/a n/a n/a EPSON 8: REGISTERS Read/Write Memory Memory Address Off- Address Off- set Bit 1 set Bit 0 Read/Write Screen 1 Verti- Screen 1 Verti- ...
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... Line 0 Last Pixel Address=((REG[0Dh], REG[0Ch]) + Line 0 Line 1 Line=(REG[13h], REG[12h]) REG[11h] Words 8(REG[04h]+1) Pixels Virtual Image Figure 8-1 Screen-Register Relationship LUT Address LUT Address Bit 4 Bit 3 EPSON (8(REG[04h]+1) BPP/16)) Words ((REG[06h], REG[05])+1) Lines Read/Write LUT Address LUT Address LUT Address Bit 2 Bit 1 Bit 0 ...
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... GPIO3 Pin IO GPIO2 Pin IO Configuration Configuration Configuration GPIO4 Pin IO GPIO3 Pin IO GPIO2 Pin IO Status Status Status Scratch bit 4 Scratch bit 3 Scratch bit 2 EPSON 8: REGISTERS Read/Write n/a n/a Read/Write GPIO1 Pin IO GPIO0 Pin IO Configuration Configuration . DD Read/Write GPIO1 Pin IO ...
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... Where CLK is CLKI (REG[02h] bit CLKI/2 (REG[02h] bit EPSON Read/Write Portrait Mode Portrait Mode reserved Pixel Clock Pixel Clock Select Bit 1 Select Bit 0 Mode Landscape PCLK = MCLK = CLK See Reg[02h] bit 5 CLK CLK CLK/2 CLK/2 CLK/4 CLK/4 CLK/8 CLK/8 CLK/2 CLK ...
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... S1D13705 and/or any panel connected to the S1D13705. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) Line Byte Line Byte Line Byte Count bit 4 Count bit 3 Count bit 2 EPSON 8: REGISTERS Read/Write Line Byte Line Byte 1 0 Count bit Count bit 1-55 ...
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... HNDP = Horizontal Non-Display Period = ((REG[08h] bits 4- Pixels VDP = Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7- Lines VNDP = Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines 1-56 C ALCULATION f PCLK = ---------------------------------------------------------------------------------------- - HDP + HNDP VDP + VNDP f PCLK = -------------------------------------------------------------------------------------------------- - VDP 2 HDP + HNDP ----------- - + VNDP 2 EPSON S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... Host Address Figure 10-1 1/2/4/8 Bit-Per-Pixel Display Data Memory Organization S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) F ORMATS bit Display Memory bit Display Memory bit Display Memory bit Display Memory EPSON 10: DISPLAY DATA FORMATS Panel Display Panel Display Panel Display Panel Display 1-57 ...
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... Bit-per-pixel Monochrome Mode Green Look-Up Table 256 bit-per-pixel data from Display Buffer Figure 11-2 2 Bit-per-pixel Monochrome Mode Data Output Path 1-58 A ABLE RCHITECTURE 4-bit Gray Data EPSON = unused Look-Up Table entries 4-bit Gray Data = unused Look-Up Table entries S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... Figure 11-3 4 Bit-per-pixel Monochrome Mode Data Output Path S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) 11: LOOK-UP TABLE ARCHITECTURE 0000 0001 0010 0011 0100 0101 0110 4-bit Gray Data 0111 1000 1001 1010 1011 1100 1101 1110 1111 = unused Look-Up Table entries EPSON 1-59 ...
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... Green Look-Up Table 256 Blue Look-Up Table 256 bit-per-pixel data from Display Buffer Figure 11-4 1 Bit-per-pixel Color Mode Data Output Path 1-60 4-bit Red Data 0 1 4-bit Green Data 0 1 4-bit Blue Data unused Look-Up Table entries EPSON S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... FE FF Blue Look-Up Table 256 bit-per-pixel data from Display Buffer Figure 11-5 2 Bit-per-pixel Color Mode Data Output Path S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) 11: LOOK-UP TABLE ARCHITECTURE 00 4-bit Red Data 4-bit Green Data 4-bit Blue Data unused Look-Up Table entries EPSON 1-61 ...
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... 0000 01 0001 02 0010 03 0011 04 0100 05 0101 06 0110 07 0111 08 1000 09 1001 0A 1010 0B 1011 0C 1100 0D 1101 0E 1110 0F 1111 EPSON 4-bit Red Data 4-bit Green Data 4-bit Blue Data = unused Look-Up Table entries S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... Blue Data 1111 1000 1111 1001 1111 1010 1111 1011 1111 1100 1111 1101 1111 1110 1111 1111 EPSON 1-63 ...
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... A SwivelView window C 240 image seen by programmer = image in display buffer Figure 12-1 Relationship Between The Screen Image and the Image Refreshed by S1D13705 in Default Mode 1-64 M ODE B E display start address D EPSON 320 image refreshed by S1D13705 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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... Note: Vertical panning by a single line is not supported in Default SwivelView Mode. S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) = AddressOfPixelB = AddressOfPixelA = AddressOfPixelA = AddressOfPixelA 256 256 ----------------------------------------- - = -------- - = 256 = 8bpb 8bpp 1 EPSON 12: SWIVELVIEW MODE + ByteOffset 240pixels 8bpp + -------------------------------------------- – 1 8bpb + EFh 00h : see REG[1Ch] for explanation 1-65 ...
Page 75
... A SwivelView window C 320 image seen by programmer = image in display buffer Figure 12-2 Relationship Between The Screen Image and the Image Refreshed by S1D13705 in Alternate Mode 1-66 B display start address D EPSON 480 image refreshed by S1D13705 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
Page 76
... Increment the register by the value in the Line Byte Count register to pan vertically by one line, e.g. add A0h to pan by one line in the example above S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) = Address Of Pixel B = Address Of Pixel A = Address Of Pixel A = Address Of Pixel A 320 320 = ----------------------------------------- - = -------- - = 160 8bpb 4bpp 2 EPSON 12: SWIVELVIEW MODE + Byte Offset 320pixels 4bpp -------------------------------------------- + – 1 8bpb + 9Fh = A0h 1-67 ...
Page 77
... CLK must be 6MHz. Note that 25MHz is the maxi- mum CLK, so PCLK cannot be higher than 12.5MHz in this mode. Higher than Default Mode. Vertical panning in 1 line increments. Higher performance than Default Mode. EPSON SwivelView Alternate Mode Does not require a virtual image. S1D13705F00A HARDWARE FUNCTIONAL ...
Page 78
... X X Table 13-4 Power Save Mode Function Summary Hardware Power Save Inactive Forced Low Forced Low EPSON 13: POWER SAVE MODES Mode Software Power Save Mode reserved reserved Normal Operation Hardware Power Save Mode Software Power Normal Save Yes Yes Yes Yes No Yes ...
Page 79
... BCLK must be present for at least one T 1-70 11 Power Save Mode 0 frame 127 frames power-up power-down Figure 13-1 Panel On/Off Sequence + 12T BCLK MCLK before the start of an access. BCLK EPSON frame power-up ] after the end of the access S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
Page 80
... BCLK MCLK access before shutting BCLK off. Allow one BCLK pulse after starting up BCLK before the next access. Required Not Required EPSON 13: POWER SAVE MODES CLKI Not Required Requied Not Required Can be stopped after 128 frames from entering Software Power Save, i.e. after REG[03h] bits 1 ...
Page 81
... MECHANICAL DATA 14 M ECHANICAL QFP14 - 80 pin 1-72 D ATA ± 0.4 14.0 ± 0.1 12.0 Index + 0.1 0.18 0.5 - 0.05 0.5 Figure 14-1 Mechanical Drawing QFP14 EPSON Unit 0~10˚ ± 0.2 1.0 S1D13705F00A HARDWARE FUNCTIONAL SPECIFICATION (X27A-A-001-06) ...
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...
Page 83
... Register / Memory Access .......................................................................................................2-40 Power Save..............................................................................................................................2-41 Drawing ....................................................................................................................................2-42 LUT Manipulation .....................................................................................................................2-43 9.5 Porting LIBSE to a new target platform .......................................................................................2-44 Building the LIBSE library for SH3 target example ..................................................................2-44 S1D13705F00A PROGRAMMING NOTES AND EXAMPLES CONTENTS ..............................................................2-23 OWER AVE ODES (HAL).................................................................................2-32 EPSON CONTENTS 2-i ...
Page 84
... Building the HAL library for the target example ....................................................................... 2- .......................................................................................................................2-46 AMPLE ODE 10.1 Sample code using the S1D13705 HAL API............................................................................... 2-46 10.2 Sample code without using the S1D13705 HAL API .................................................................. 2-48 10.3 Header Files................................................................................................................................ 2-54 2-ii EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES ...
Page 85
... Suggested LUT Values for 4 Bpp Gray Shade...................................................................2-14 Table 5-1 Number of Pixels Panned Using Start Address..................................................................2-17 Table 7-1 Default and Alternate Portrait Mode Comparison...............................................................2-28 Table 9-1 HAL Functions....................................................................................................................2-33 S1D13705F00A PROGRAMMING NOTES AND EXAMPLES List of Figures List of Tables EPSON CONTENTS 2-iii ...
Page 86
... The guide also introduces the Hardware Abstraction Layer (HAL), which is designed to make programming the S1D13705 as easy as possible. Future S1D1370x products will support the HAL allowing OEMs the ability to upgrade to future chips with relative ease. S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) EPSON 1: INTRODUCTION 2-1 ...
Page 87
... The example initializes a S1D13705 to control a panel with the following specifications: • 320 240 color single passive LCD panel at 70Hz. • Color Format 2, 8-bit data interface. • 8 bit-per-pixel (256 colors). • 6 MHz input clock (CLKI). 2-2 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 88
... S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) Table 2-1 S1D13705 Initialization Sequence Notes = pixels EPSON 2: INITIALIZATION See Also Frame Rate Calculation Frame Rate Calculation “5.3 Split Screen” on page 2-20 “ ...
Page 89
... Similarly, setting a large HNDP value may cause a degrade in image quality. If possible the system should be designed such that VNDP values less lines and HNDP values less characters can be selected. 2-4 PCLK = ---------------------------------------------------------------------------------------- - HDP + HNDP VDP + VNDP PCLK = -------------------------------------------------------------------------------------------------- - VDP 2 HDP + HNDP ----------- - + VNDP 2 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 90
... Figure 3-2 Pixel Storage for 2 Bpp (4 Colors/Gray Shades) in One Byte of Display Buffer S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ODELS Bit 4 Bit 3 Pixel 3 Pixel 4 Bit 4 Bit 3 Pixel 1 Pixel 2 Bit 0 Bit 1 EPSON 3: MEMORY MODELS Bit 2 Bit 1 Bit 0 Pixel 5 Pixel 6 Pixel 7 Bit 2 Bit 1 Bit 0 Pixel 2 Pixel 3 Pixel 3 ...
Page 91
... Figure 3-4 Pixel Storage for 8 Bpp (256 Colors) in One Byte of Display Buffer 2-6 Bit 4 Bit 3 Bit 2 Pixel 0 Pixel 1 Pixel 1 Bit 0 Bit 3 Bit 2 Bit 4 Bit 3 Bit 2 Green bit 2 Green bit 1 Green bit 0 EPSON S1D13705F00A PROGRAMMING NOTES Bit 1 Bit 0 Pixel 1 Pixel 1 Bit 1 Bit 0 Bit 1 Bit 0 Blue bit 1 Blue bit 0 AND EXAMPLES (X27A-G-002-01) ...
Page 92
... However, most applications specify the red, green and blue components as eight bit intensities. To determine the appropriate S1D13705 Look-Up Table value we recomend using the four most significant bits. S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) (LUT) ABLE EPSON 4: LOOK-UP TABLE (LUT) 2-7 ...
Page 93
... Table 4-1 Recommended LUT Values for 1 Bpp Color Mode 2-8 LUT Address LUT Address Bit 4 Bit 3 LUT Data n/a Bit 0 Index Red Green ... unused entries EPSON Read/Write LUT Address LUT Address LUT Address Bit 2 Bit 1 Bit 0 Read/Write n/a n/a n/a Blue S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 94
... LUT entry. The following table shows the example values for 2 bit-per-pixel display mode. Table 4-2 Example LUT Values for 2 Bpp Color Mode S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) Index Red Green ... indicates unused entries EPSON 4: LOOK-UP TABLE (LUT) Blue 2-9 ...
Page 95
... The following table shows the example values for 4 bit-per-pixel display mode. These colors simulate the colors used by the sixteen color modes of a VGA. Table 4-3 Suggested LUT Values to Simulate VGA Default 16 Color Palette 2-10 Index Red Green ... indicates unused entries EPSON Blue S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 96
... Look-Up Table entry. The following table depicts LUT values which approximate the VGA default 256 color palette. Table 4-4 Suggested LUT Values to Simulate VGA Default 256 Color Palette Index Index S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01 Index EPSON 4: LOOK-UP TABLE (LUT Index 2- ...
Page 97
... LUT 0 index is displayed. A bit value of “1” results in the color in green LUT 1 index being displayed. The following table shows the recommended values 1 bpp gray shade display mode Table 4-5 Recommended LUT Values for 1 Bpp Gray Shade Address 2- Index Red Green ... unused entries EPSON G B Index Blue S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01 ...
Page 98
... LUT entry and “11” displays a from the fourth LUT entry. The following table shows the example values for 2 bit-per-pixel display mode. Table 4-6 Suggested Values for 2 Bpp Gray Shade Index ... FF S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) Red Green indicates unused entries EPSON 4: LOOK-UP TABLE (LUT) Blue 2-13 ...
Page 99
... Look-Up Table being displayed. The following table shows the example values for 4 bit-per-pixel display mode. Table 4-7 Suggested LUT Values for 4 Bpp Gray Shade 2-14 Index Red Green ... indicates unused entries EPSON Blue S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
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... AND EXAMPLES (X27A-G-002-01) T ECHNIQUES 320 240 Viewport 640 480 “Virtual” Display Figure 5-1 Viewport Inside a Virtual Display Memory Memory Address Offset Address Offset Bit 4 Bit 3 EPSON 5: ADVANCED TECHNIQUES Memory Memory Memory Address Offset Address Offset Address Offset Bit 2 Bit 1 Bit 0 2-15 ...
Page 101
... When portrait mode (see “7 Hardware Rotation” on page 2-25) is enabled the start address registers become offsets to bytes. In this mode the step rate for the start address registers if halved making for smoother panning. 2-16 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
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... Start Addr Start Addr Bit 12 Bit 11 Bit 10 n/a n/a Landscape Mode Pixels Per Byte Number of Pixels Panned EPSON 5: ADVANCED TECHNIQUES Start Addr Start Addr Bit 1 Bit 0 Start Addr Start Addr Bit 9 Bit 8 Start Addr n/a n/a Bit 16 Portrait Mode Number of Pixels Panned 8 4 ...
Page 103
... The routine SetStartAddress() break up its long integer argument into three register values and store the values. void SetStartAddress(long SA) { REG[0C] = REG[0D] = (SA >> Reg[10] = (SA >> 16) & 0xFF; } 2-18 SA & 0xFF; 8) & 0xFF; EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 104
... Determine the number of words in one virtual scanline. bytes_per_line = pixels_per_line / pixels_per_byte = 320 / 2 = 160 words_per_line = bytes_per_line / 2 = 160 / Step 2: Scroll up or down To scroll up. StartWord = GetStartAddress(); StartWord -= words_per_line; if (StartWord < 0) StartWord = 0; SetStartAddress(StartWord); To scroll down. StartWord = GetStartAddress(); StartWord += words_per_line; SetStartAddress(StartWord); } S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 5: ADVANCED TECHNIQUES EPSON 2-19 ...
Page 105
... Screen 2 Display Start Address. 2-20 Scan Line 0 ... Image 1 Scan Line 199 Scan Line 200 ... Image 2 Scan Line 239 Screen 1 Vertical Size Registers = 199 lines Bit 4 Bit 3 n/a n/a EPSON Bit 2 Bit 1 Bit 0 n/a Bit 9 Bit 8 S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
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... S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) Start Addr Start Addr Start Addr Bit 4 Bit 3 Bit 2 Start Addr Start Addr Start Addr Bit 12 Bit 11 Bit 10 EPSON 5: ADVANCED TECHNIQUES Start Addr Start Addr Bit 1 Bit 0 Start Addr Start Addr Bit 9 Bit 8 2-21 ...
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... Calculate the Screen 2 Start Word Address register values. Screen 2 display data is coming from the very beginning of the display buffer. All there here is ensure that both the LSB and MSB of the Screen 2 Start Word Address registers are set to zero. 2-22 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 240 ...
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... LCD logic signals being active before power is applied to the panel. S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 6: LCD POWER SEQUENCING AND POWER SAVE MODES S EQUENCING AND Hardware LCDPWR Power Save Override Enable EPSON P OWER Software Software Power Save Power Save bit 1 bit 0 2-23 ...
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... Disable the LCD logic by setting the software power save in REG[03h] or setting hardware power save via GPIO0. Keep in mind that after setting the power save mode there will be 127 frames before the LCD logic signals are disabled. 2-24 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
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... The programmer sees memory addresses increasing from A->B and from C->D. From a hardware perspective the S1D13705 always refreshes the LCD panel in the order B->D and down to do A->C. S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) R OTATION 240 panel. E display start address image refreshed by S1D13705 EPSON 7: HARDWARE ROTATION 320 2-25 ...
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... In fact the change in memory usage may make the difference between being able to run certain panels in SwivelView mode or not being able to do so. 2-26 B display start address D EPSON 480 image refreshed by S1D13705 S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
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... SwivelView n/a n/a Mode Memory Clock Select EPSON 7: HARDWARE ROTATION bit 1 bit 0 bit 9 bit 8 n/a bit 16 bit 1 bit 0 SwivelView SwivelView Mode Pixel Clock Mode Pixel Clock Select Bit 1 Select Bit 0 ...
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... Higher than Default Mode. Vertical panning in 1 line increments. Higher performance than Default Mode. Note that performance can be increased by increasing CLK and setting MCLK = CLK (REG[1Bh] bit 2 = 1). EPSON Alternate SwivelView Mode x PCLK. For S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 114
... Horizontal Non-Display Period = 88h Vertical Non-Display Period = 03h Plugging the values into the frame rate calculations yields: S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 240 8-bit color to be run with a 16 MHz input clock. EPSON 7: HARDWARE ROTATION 2-29 ...
Page 115
... In this case 281h (81h + 200h) will be written to the Screen 1 Start Address register set. Set Screen1 Display Start Word Address LSB (REG[0Ch]) to 81h and Screen1 Display Start Word Address MSB (REG[0Dh]) to 02h. 2-30 PCLK = ---------------------------------------------------------------------------------------- - HDP + HNDP VDP + VNDP 16 000 000 ----------------------------- - 2 = ------------------------------------------------------- = 80.69 320 + 88 240 + 3 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 116
... From reset (power on) the steps to identifying the S1D13705 are as follows: 1. Read REG[00h]. Mask off the lower two bits, the revision code, to obtain the product code. 2. The product code for the S1D13705 is 024h. S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 8: IDENTIFYING THE S1D13705 S1D13705 EPSON 2-31 ...
Page 117
... H ARDWARE 9.1 Introduction The HAL is a processor independent programming library provided by Epson. The HAL was developed to aid the implementation of internal test programs, and provides an easy, consistent method of programming the S1D13705 on different processor platforms. The HAL also allows for easier porting of programs between S1D1370x products. Integral to the HAL is an information structure (HAL_STRUCT) that contains confi ...
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... Control S1D13705 SW power save mode (enable/disable) S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 9: HARDWARE ABSTRACTION LAYER (HAL) Table 9-1 HAL Functions Description Initialization: General HAL Support: Advanced HAL Functions: Hardware Rotate: Register / Memory Access: Color Manipulation: Drawing: Power Save: EPSON 2-33 ...
Page 119
... Note: After this call the Look-Up Table will be set to a default state appropriate to the display type. Unlike S1D1350x HAL versions, this function does not call seSetDisplayMode as this function does not exist in the 13705 HAL. 2-34 - pointer to HAL_STRUCT information structure - operation completed with no problems - operation completed with no problems EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 120
... Pointer to string to return the version in. - must point to an allocated string of size VER_SIZE - Pointer to a string to return the release status in. - must point to an allocated string of size STATUS_SIZE - Pointer to return the current revision of status. - must point to an allocated string of size STAT_REV_SIZE EPSON 2-35 ...
Page 121
... EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 122
... HAL.H) to indicate whether to enable of disable high performance. - call with style set to DEFAULT (-1) to select Default SwivelView Mode - call with style set to any other value to select Alternate SwivelView Mode. EPSON 2-37 ...
Page 123
... SwivelView. - offset, in bytes, to the start of screen 1 - offset, in bytes, to the start of screen 2 - operation completed with no problems - must be set (or use the constants SCREEN1 or SCREEN2) - operation completed with no problems vertical panel size or WhichScreen is not SCREEN 1 or SCREEN 2. EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 124
... SCREEN1 or SCREEN2, to identify which screen to base calculations on - new starting X position in pixels - new starting Y position in pixels - operation completed with no problems 1) WhichScreen is not SCREEN1 or SCREEN2. 2) the y argument is greater than the last available line less the screen height. EPSON 2-39 ...
Page 125
... WORD to return the value in - operation completed with no problems. - offset from start of the display buffer to read from - pointer to a DWORD to return the value in - operation completed with no problems. EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 126
... WORD value to write - number of words to write - operation completed with no problems 80 kb. - offset from start of the display buffer - DWORD value to write - number of dwords to write - operation completed with no problems 80 kb. EPSON 2-41 ...
Page 127
... The color to draw the rectangle outline and fill with - Color is an index into the Look-Up Table. - Flag whether to fill the rectangle or simply draw the border. - Set to 0 for no fill, set to non-0 to fill the inside of the rectangle - operation completed with no problems. EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 128
... BYTE lut[16][3] - pLUT must point to enough memory to hold 'Count bytes of data. - the number of LUT elements to read. - index to LUT entry (0 to 255) - pointer to an array of three bytes. - index to LUT entry (0 to 255) - pointer to an array of three bytes EPSON 2-43 ...
Page 129
... HARDWARE ABSTRACTION LAYER (HAL) 9.5 Porting LIBSE to a new target platform Building Epson Research and Development applications like a simple HelloApp for a new target platform requires 3 things, the HelloApp code, the 13705 HAL library, and a some standard C functions (portable ones are encapsulated in our mini C library LIBSE). ...
Page 130
... The Gnu compiler tools are pointed to by TOOLDIR. With nmake in your path run: nmake -fmakesh3.mk S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 9: HARDWARE ABSTRACTION LAYER (HAL) EPSON 2-45 ...
Page 131
... Sample code using the S1D13705 HAL API /* **=========================================================================== ** SAMPLE1.C - Sample code demonstrating a program using the S1D13705 HAL. **------------------------------------------------------------------------- ** Created 1998, Vancouver Design Centre ** Copyright (c) 1998, 1999 Epson Research and Development, Inc. ** All Rights Reserved. **------------------------------------------------------------------------- ** ** The HAL API code is configured for the following: ** ...
Page 132
... Clear the display. Do this by writing 81920 bytes */ seWriteDisplayBytes(0, 0, EIGHTY_K Setup portrait mode. */ seSetHWRotate(PORTRAIT Draw a solid blue 100x100 rectangle in center of the display. ** This starting co-ordinates, assuming a 320x240 display is ** (320-100)/2 , (240-100)/2 = 110,70. */ seDrawRect(110, 70, 210, 170, 2, TRUE Done! */ exit(0); } S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) EPSON 10: SAMPLE CODE 2-47 ...
Page 133
... SAMPLE2.C - Sample code demonstating a direct access of the S1D13705. **------------------------------------------------------------------------- ** Created 1998, Vancouver Design Centre ** Copyright (c) 1998, 1999 Epson Research and Development, Inc. ** All Rights Reserved. **------------------------------------------------------------------------- ** ** The sample code using direct S1D13705 access ** will configure for the following: ...
Page 134
... Register 01h: Mode Register 0 - Color, 8-bit format 2 */ SET_REG(0x01, 0x20); /* S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) 0x03, 0x27, 0xEF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00 ((BYTE)(w)) ((BYTE)(((WORD)(w) >> 8) & 0xFF)) (*(pRegs + idx)) = (val) EPSON 10: SAMPLE CODE 0x00, 0x00, 0x00, */ 2-49 ...
Page 135
... HNDP) * (VDP + VNDP) - Calculated in conjunction with register 08h (HNDP) to achieve the desired frame rate. - Start address should be set Set this start address to 0 too - Used for setting memory to a width greater than the EPSON = (0+ pels S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 136
... This step has no real purpose. It sets the GPIO pins low should GPIO be set as outputs. - Use this register to store whatere state data your system may require. - Set start RGB sequencing at the first LUT entry. - Write 16 RGB triplets to the LUT. EPSON 10: SAMPLE CODE 2-51 ...
Page 137
... OffsetBytes = Height * BitsPerPixel / Set Line Byte Count to size of the ROTATED width (i.e. current height Start Address to the offset of the width of the ROTATED display. ** (in portrait mode the start address registers point to bytes) */ SET_REG(0x1C, (BYTE)OffsetBytes); 2-52 EPSON S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 138
... This will dynamically UNLOAD the Virtual Device for Win95. */ CloseHandle(hDriver); if (rc) return 0; return -1; } S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) of two. In this case, we use a value of 256 pixels for our calculations instead of the panel dimension of 240. &Arr[0 sizeof(ULONG), &retVal, sizeof(ULONG), &cbReturned, NULL); EPSON 10: SAMPLE CODE 2-53 ...
Page 139
... The header files included here are the required for the HAL sample to compile correctly. /* **=========================================================================== ** HAL.H - Header file for use with programs written to use the S1D13705 HAL. **--------------------------------------------------------------------------- ** Created 1998, Vancouver Design Centre ** Copyright (c) 1998, 1999 Epson Research and Development, Inc. ** All Rights Reserved. **=========================================================================== */ #ifndef _HAL_H_ #define _HAL_H_ #include " ...
Page 140
... MAX_NON_DISP_X #define MIN_NON_DISP_Y #define MAX_NON_DISP_Y enum { RED, GREEN, BLUE }; S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) " #exp2 "=%d\n", exp1, exp2 error, call was successful General purpose failure Function was called with invalid parameter 256 2 64 EPSON 10: SAMPLE CODE */ 2-55 ...
Page 141
... DWORD color, BOOL Solidfill ); /*------------------------------ Color ------------------------------------*/ int seSetLut( BYTE *pLut ); int seGetLut( BYTE *pLut ); int seSetLutEntry( int index, BYTE *pEntry ); int seGetLutEntry( int index, BYTE *pEntry ); #endif /* _HAL_H_ */ /* **=========================================================================== 2-56 FUNCTION PROTO-TYPES EPSON */ S1D13705F00A PROGRAMMING NOTES AND EXAMPLES (X27A-G-002-01) ...
Page 142
... APPCFG.H - Application configuration information. **--------------------------------------------------------------------------- ** Created 1998 - Vancouver Design Centre ** Copyright (c) 1998, 1999 Epson Research and Development, Inc. ** All Rights Reserved. **--------------------------------------------------------------------------- ** ** The data in this file was generated using 1375CFG.EXE The configureation parameters chosen were: ** 320x240 Single Color 4-bit STN ** 4 bpp - 100 Hz Frame Rate (12 MHz CLKi) ...
Page 143
... REG_GPIO_STATUS #define REG_SCRATCHPAD #define REG_PORTRAIT_MODE #define REG_LINE_BYTE_COUNT #define REG_NOT_PRESENT_1 /* ** WARNING!!! MAX_REG must be the last available register!!! */ #define MAX_REG #endif /*---------------------------------------------------------------------------- ** ** Copyright (c) 1998, 1999 Epson Research and Development, Inc. ** All Rights Reserved Module Name ioctl Abstract Include file for S1D13xxx PCI Board Driver. ...
Page 144
...
Page 145
... S1D13705 Supported Evaluation Platforms ............................................................................3-22 Installation ................................................................................................................................3-22 Usage.......................................................................................................................................3-23 1375PLAY Example .................................................................................................................3-24 Scripting ...................................................................................................................................3-24 Comments................................................................................................................................3-24 Program Messages ..................................................................................................................3-25 6 1375BMP D P EMONSTRAION 6.1 1375BMP.....................................................................................................................................3-26 Installation ................................................................................................................................3-26 S1D13705F00A UTILITIES CONTENTS ......................................................................................3-1 ROGRAM P ................................................................................3-13 ROGRAM ............................................................................................3-22 ....................................................................................3-26 ROGRAM EPSON CONTENTS 3-i ...
Page 146
... CONTENTS Usage ...................................................................................................................................... 3-26 Comments ............................................................................................................................... 3-26 Program Messages.................................................................................................................. 3-27 7 1375PWR OWER AVE 7.1 1375PWR.................................................................................................................................... 3-28 S1D13705 Supported Evaluation Platforms ............................................................................ 3-28 Installation................................................................................................................................ 3-28 Usage ...................................................................................................................................... 3-29 Program Messages.................................................................................................................. 3-29 3-ii ...........................................................................................3-28 TILITY EPSON S1D13705F00A UTILITIES ...
Page 147
... Figure 1-9 1375CFG File Open Dialog ................................................................................................3-10 Figure 1-10 ERROR: Unable to read HAL.............................................................................................3-10 Figure 1-11 1375CFG Save As Dialog ..................................................................................................3-11 Figure 1-12 ERROR: Unable to read HAL.............................................................................................3-11 Table 1-1 MCLK to PCLK Ratios..........................................................................................................3-5 S1D13705F00A UTILITIES List of Figures List of Table EPSON CONTENTS 3-iii ...
Page 148
... After starting you will be presented with a tabbed dialog box containing four buttons and two tabs: CFG and REGS. The following sections will describe the using the tabs followed by a description of the buttons. X27A-B-001-01 S1D13705F00A UTILITIES (X27A-B-001-01) 1: 1375CFG CONFIGURATION PROGRAM ONFIGURATION EPSON P ROGRAM 3-1 ...
Page 149
... Upon opening 1375CFG the user is present with a window which appears as in Figure 1-1. The CFG tab is the dominant portion of the window and consists of four main sections: Panel information (includes Dimensions), Look-Up Table, Miscellaneous Options, and System settings. Each of these sections will be discussed in detail. 3-2 Figure 1-1 1375CFG Window EPSON S1D13705F00A UTILITIES (X27A-B-001-01) ...
Page 150
... Mask FPSHIFT - when selected causes the signal FPSHIFT to be masked. This option is required by most newer monochrome panels. Whenever either color panel or TFT is selected this option is disabled. S1D13705F00A UTILITIES (X27A-B-001-01) 1: 1375CFG CONFIGURATION PROGRAM Figure 1-2 Panel Information EPSON 3-3 ...
Page 151
... These settings are TFT specific and are disabled when STN panel is selected. When an STN panel type is selected the pulse directions are preset to +ve, +ve. 3-4 and FPFRAME pulses in TFT modes. EPSON S1D13705F00A UTILITIES (X27A-B-001-01) ...
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... SwivelView Mode - selecting this option causes register settings and timings to be saved for SwivelView mode operation. S1D13705F00A UTILITIES (X27A-B-001-01) 1: 1375CFG CONFIGURATION PROGRAM Figure 1-3 Miscellaneous Options of the S1D13705. modes. Table 1-1 MCLK to PCLK Ratios Ratio 1 MCLK = PCLK / 8 2 MCLK = PCLK / 4 4 MCLK = PCLK / 2 8 MCLK = PCLK EPSON 3-5 ...
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... Input Clock - this field specifies the input clock being applied to the S1D13705 in kHz. 3-6 Figure 1-4 System Options Figure 1-5 ERROR: Frame Rate Figure 1-6 ERROR: Zero Frame Rate EPSON S1D13705F00A UTILITIES (X27A-B-001-01) ...
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... Note: The primary use for the Look-Up Table color depth settings are for a developer to derive a set of register values for inclusion in a program. Most of the sample programs based on the HAL override the color depth for testing purposes. S1D13705F00A UTILITIES (X27A-B-001-01) 1: 1375CFG CONFIGURATION PROGRAM Figure 1-7 Look-Up Table Control EPSON 3-7 ...
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... Correct the suspect value before attempting to save the configuration. If this warning is ignored it will lead to the message box shown in Figure 1-5 on page 3-6 or Figure 1-6 on page 3-6 being displayed when the “Save” button is clicked. 3-8 EPSON S1D13705F00A UTILITIES (X27A-B-001-01) ...
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... IMPORTANT : do not return to the CFG page after making register adjustments on this page. Doing so will result in an automatic recalculation of some register values and the possible loss of adjusted settings. S1D13705F00A UTILITIES (X27A-B-001-01) 1: 1375CFG CONFIGURATION PROGRAM Figure 1-8 REGS Window EPSON 3-9 ...
Page 157
... If 1375CFG is unable locate the HAL information in the selected file the following dialog box is displayed. 3-10 Figure 1-9 1375CFG File Open Dialog Figure 1-10 ERROR: Unable to read HAL EPSON S1D13705F00A UTILITIES (X27A-B-001-01) ...
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... Clicking on the Help button will start the help file for 1375CFG. Exit Clicking on the Exit button exits 1375CFG immediately. The user is not prompted to save any changes they may have made. S1D13705F00A UTILITIES (X27A-B-001-01) 1: 1375CFG CONFIGURATION PROGRAM Figure 1-11 1375CFG Save As Dialog Figure 1-12 ERROR: Unable to read HAL EPSON 3-11 ...
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... It is assumed that the 1375CFG user is familiar with S1D13705 hardware and software. Refer to the “S1D13705 Hardware Functional Specification” drawing office number X27A-A-001-02, and the “S1D13705 Programming Notes and Examples” manual, drawing office number X27A-G-002-01 for information. 3-12 EPSON S1D13705F00A UTILITIES (X27A-B-001-01) ...
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... Windows Device Driver Installation Guide”, document number X00A-E-003-xx. Copy the file 1375SHOW.EXE to a directory that is in the DOS path on your hard drive. Embedded Platform Download the program 1375SHOW to the system. X27A-B-002-01 S1D13705F00A UTILITIES (X27A-B-002-01) 2: 1375SHOW DEMONSTRATION PROGRAM EMONSTRATION EPSON P ROGRAM 3-13 ...
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... EPSON S1D13705F00A UTILITIES (X27A-B-002-01) ...
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... This message is printed if there is insufficient display memory to show a complete image with a width of www pixels, a height of hhh pixels and a color depth of bpp bit-per-pixel. In this case the mode is skipped and the next display mode is attempted. S1D13705F00A UTILITIES (X27A-B-002-01) 2: 1375SHOW DEMONSTRATION PROGRAM EPSON 3-15 ...
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... S1D13XXX 32-Bit Windows Device Driver Installation Guide, document number X00A-E-003-xx. Copy the file 1375SPLT.EXE to a directory that is in the DOS path on your hard drive. Embedded Platform Download the program 1375SPLT to the system. X27A-B-003-01 3-16 U ISPLAY TILITY EPSON S1D13705F00A UTILITIES (X27A-B-003-01) ...
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... Screen move Screen 2 down HOME covers Screen 1 with Screen 2 END displays only Screen 1 change the direction of split screen movement any key (for PC only) changes the color depth (bits-per-pixel) b exits 1375SPLT ESC EPSON 3: 1375SPLT DISPLAY UTILITY 3-17 ...
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... Not enough memory for www x hhh x bpp!! This message is displayed if there is insufficient display memory to contain two complete images with a width of www pixels, a height of hhh pixels, and a color depth of bpp bit-per-pixel. In this case the mode is skipped and the next display mode is attempted. 3-18 EPSON S1D13705F00A UTILITIES (X27A-B-003-01) ...
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... Windows Device Driver Installation Guide”, document number X00A-E-003-xx. Copy the file 1375VIRT.EXE to a directory that is in the DOS path on your hard drive. Embedded Platform Download the program 1375VIRT to the system. X27A-B-004-01 S1D13705F00A UTILITIES (X27A-B-004-01) U ISPLAY TILITY EPSON 4: 1375VIRT DISPLAY UTILITY 3-19 ...
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... END the virtual screen shows in the lower left of the display changes the direction of screen any key changes the color depth (bits-per-pixel) b exits 1375VIRT ESC EPSON S1D13705F00A UTILITIES (X27A-B-004-01) ...
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... Specifically, the maximum number of lines for the image is calculated using the current virtual width. If the number of possible lines is less than the physical display size this message is displayed. Try restarting the program and manually specify a smaller virtual width. S1D13705F00A UTILITIES (X27A-B-004-01) 4: 1375VIRT DISPLAY UTILITY EPSON 3-21 ...
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... Windows Device Driver Installation Guide”, document number X00A-E-003-xx. Copy the file 1375PLAY.EXE to a directory that is in the DOS path on your hard drive. Embedded Platform Download the program 1375PLAY to the system. X27A-B-005-01 3-22 U IAGNOSTIC TILITY EPSON S1D13705F00A UTILITIES (X27A-B-005-01) ...
Page 170
... Sets software power save mode 0-2. Power save mode 0 is normal operation. Halts after specified lines of display. This feature halts the display during long read operations to prevent data from scrolling off the display. Set 0 to disable. Quits this utility. Displays Help information. EPSON 3-23 ...
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... All numeric values are considered to be hexadecimal unless identified otherwise. For example 10h = 16 decimal; 10t = 10 decimal; 010b = 2 decimal. • Redirecting commands from a script file (PC platform) allows those commands to be executed as though they were typed. 3-24 EPSON S1D13705F00A UTILITIES (X27A-B-005-01) ...
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... This message indicates an error at the IO control layer occurred. The usual cause for this is an incorrect hardware configuration. ERROR: The HAL returned an unknown error This message should never be displayed, it indicates that 1375PLAY is unable to determine the cause of an error returned from the HAL. S1D13705F00A UTILITIES (X27A-B-005-01) 5: 1375PLAY DIAGNOSTIC UTILITY EPSON 3-25 ...
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... Help screen EPSON P ROGRAM S1D13705F00A UTILITIES (X27A-B-006-01) ...
Page 174
... S1D13705. Try choosing a smaller image. ERROR: Unable to allocate enough memory to decode the image. In order to decode a .BMP image 1375BMP needs to allocate some additional system memory. This message is seen if the call to allocate additional memory fails. S1D13705F00A UTILITIES (X27A-B-006-01) 6: 1375BMP DEMONSTRAION PROGRAM EPSON 3-27 ...
Page 175
... Windows Device Driver Installation Guide”, document number X00A-E-003-xx. Copy the file 1375PWR.EXE to a directory that is in the DOS path on your hard drive. Embedded Platform Download the program 1375PWR to the system. X27A-B-007-01 3- OWER AVE EPSON TILITY S1D13705F00A UTILITIES (X27A-B-007-01) ...
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... In this state the S1D13705 should ignore the state of the hardware power save mode input pin. S1D13705F00A UTILITIES (X27A-B-007-01) resets software power save mode sets software power save mode resets (disables) hardware power save mode (REG[03h] bit 2) sets (enables) hardware power save mode (REG[03h] bit 2) displays this usage message EPSON 7: 1375PWR POWER SAVE UTILITY 3-29 ...
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... POWER SAVE UTILITY 3-30 THIS PAGE IS BLANK. EPSON S1D13705F00A UTILITIES (X27A-B-007-01) ...
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...
Page 179
... Adjustable LCD Panel Negative Power Supply ...........................................................................4-10 6.12 Adjustable LCD Panel Positive Power Supply ............................................................................4-10 6.13 CPU/Bus Interface Header Strips................................................................................................4- ...........................................................................................................................4-11 ARTS IST ...........................................................................................................4-12 CHEMATIC IAGRAMS S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL CONTENTS ...........................................................................................4-2 .................................................................................................4-3 P ..............................................................................4-4 INOUTS .........................................................................................4-6 EPSON CONTENTS 4-i ...
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... LCD Signal Connector (J5) Pinout ....................................................................................... 4-3 Table 4-1 CPU/BUS Connector (H1) Pinout ........................................................................................ 4-4 Table 4-2 CPU/BUS Connector (H2) Pinout ........................................................................................ 4-5 Table 5-1 Host Bus Interface Pin Mapping .......................................................................................... 4-6 4-ii List of Figures List of Tables EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL ...
Page 181
... On-board adjustable LCD bias positive power supply (+23V to +40V). • On-board adjustable LCD bias negative power supply (-23V to -14V). • 16-bit ISA bus support. • CPU/Bus interface header strips for non-ISA bus support. S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) EPSON 1: INTRODUCTION 4-1 ...
Page 182
... Table 2-3 Jumper Settings 1-2 5.0V IOV DD Pulled up to IOV DD Pulled up to IOV DD 5V LCD Panel Active low (‘LCDPWR#’) EPSON Open (1 or high) Host Bus Interface 2-3 3.3V IOV DD No Connection No Connection 3.3V LCD Panel Active high (‘LCDPWR’) S5U13705B00C REV. 1.0 ISA BUS EVALUATION ...
Page 183
... LCD panel negative bias voltage (-24V to -14V) +3.3V or +5V (selectable with JP4) +12V +12V +12V LCD panel positive bias voltage (+23V to +40V) MOD MOD MOD . DD EPSON 3: LCD INTERFACE PIN MAPPING Dual Passive Panel Color TFT/D-TFD Color Mono 8-bit 8-bit 9-bit 12-bit D0 ...
Page 184
... Connected to the WE0# signal of the S1D13705 Connected to the WAIT# signal of the S1D13705 Connected to the CS# signal of the S1D13705 Not connected Connected to the WE1# signal of the S1D13705 Connected to the IOV supply of the S1D13705 DD EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) ...
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... Connected to SA19 of the ISA bus connector Ground Ground 5 volt supply 5 volt supply Connected to the R/W# signal of the S1D13705 Connected to the BS# signal of the S1D13705 Connected to the BCLK signal of the S1D13705 Connected to the RD# signal of the S1D13705 Not connected Connected to the CLKI signal of the S1D13705 EPSON 4-5 ...
Page 186
... External Decode External Decode External Decode External Decode CKIO BCLK BS# AS# RD/WR# R/W# RD# Connect Connect WE0# DD RDY# DTACK# DSACK1# RESET# RESET# RESET# EPSON M APPING Generic Bus #1 Generic Bus #2 A[16:1] A[16:1] A[16: D[15:0] D[15:0] D[15:0] DS# WE1# BHE# BCLK BCLK BCLK Connect to V Connect ...
Page 187
... When using the S5U13705B00C board on a non-ISA bus system, system or external decode logic must map the S1D13705 into an appropriate memory space. S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) D ESCRIPTION EPSON 6: TECHNICAL DESCRIPTION 4-7 ...
Page 188
... Refer to Table 5-1 for connection details. Note: When using a 3.3V host bus interface the 2-3 position. Refer to “Table 2-3 Jumper Settings,” on page 4-2. 4-8 must be set to 3.3V by setting jumper (JP1 EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) ...
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... J5. The interface signals on the cable are alternated with grounds to reduce crosstalk and noise. Refer to “Table 3-1 LCD Signal Connector (J5) Pinout,” on page 4-3 for specific connection information. S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) 6: TECHNICAL DESCRIPTION EPSON 4-9 ...
Page 190
... CNF[3:0] and BS#, appropriate external decoding logic MUST be used to access the S1D13705. Refer to “Table 5-1 Host Bus Interface Pin Mapping,” on page 4-6 for connection details. 4-10 EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) ...
Page 191
... FOX 25MHz oscillator or equiv., 14 pin DIP socketed 74AHC244 SO-22, TI74AHC244 LT1117CM-3.3 Linear Technology 5V to 3.3V regulator, 800mA PLD22V10-15 PLD type 22V10-15, 20 Pin DIP, socketed 74ALS125 SO-14, 74ALS125 74HCT04 SO-14, 74HCT04 RD-0412 Xentek RD-0412, positive PS EPN001 Xentek EPN001 negative PS EPSON 7: PARTS LIST Description 4-11 ...
Page 192
... SCHEMATIC DIAGRAMS 8 S CHEMATIC Figure 8-1 S5U13705B00C Schematic Diagram ( 4-12 D IAGRAMS EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) ...
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... Figure 8-2 S5U13705B00C Schematic Diagram ( S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) 8: SCHEMATIC DIAGRAMS 1 EPSON 4-13 ...
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... SCHEMATIC DIAGRAMS Figure 8-3 S5U13705B00C Schematic Diagram ( 4- ADJ 1 EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) ...
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... DC_OUT 12 VOUT_ADJ GND 11 GND 10 GND 8 GND 7 GND 6 GND 5 GND 4 REMOTE 3 DC_IN 2 Figure 8-4 S5U13705B00C Schematic Diagram ( S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01 DC_OUT 1 DC_OUT GND 4 GND 5 VOUT_ADJ DC_IN 10 DC_IN 11 EPSON 8: SCHEMATIC DIAGRAMS 4-15 ...
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... SCHEMATIC DIAGRAMS 4-16 THIS PAGE IS BLANK. EPSON S5U13705B00C REV. 1.0 ISA BUS EVALUATION BOARD USER’S MANUAL (X27A-G-005-01) ...
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...
Page 198
... Generic #2 Interface Mode ......................................................................................................5-26 4.4 PC Card to S1D13705 Interface..................................................................................................5-27 Hardware Connections ............................................................................................................5-27 S1D13705 Hardware Configuration .........................................................................................5-28 Register/Memory Mapping .......................................................................................................5-28 S1D13705F00A APPLICATION NOTES Contents MC68328 “D ” M RAGONBALL ICROPROCESSOR MPC821 M ....................................................5-8 ICROPROCESSOR MCF5307 “C F ” M OLD IRE ICROPROCESSOR B .......................................................................................5-24 US EPSON CONTENTS ..........................5-1 ............................5-18 5-i ...
Page 199
... The NEC VR4181A System Bus ............................................................................................. 5-49 8.3 S1D13705 Host Bus Interface..................................................................................................... 5-50 Host Bus Pin Connection......................................................................................................... 5-50 Generic #2 Interface Mode ...................................................................................................... 5-50 8.4 VR4181A to S1D13705 Interface................................................................................................ 5-51 5-ii MIPS TMPR3912 M ICROPROCESSOR MIPS PR31500/PR31700 P ROCESSOR ICROPROCESSOR ICROPROCESSOR EPSON ........................................5-29 ......................................5-36 ..............................................5-44 ....................................................5-49 S1D13705F00A APPLICATION NOTES ...
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... Hardware Description ..............................................................................................................5-51 S1D13705 Hardware Configuration .........................................................................................5-52 NEC VR4181A Configuration...................................................................................................5-52 8.5 Software ......................................................................................................................................5-53 9 S1D13705 P C OWER ONSUMPTION 9.1 S1D13705 Power Consumption ..................................................................................................5-54 Conditions ................................................................................................................................5-55 9.2 Summary .....................................................................................................................................5-55 S1D13705F00A APPLICATION NOTES .........................................................................................5-54 EPSON CONTENTS 5-iii ...