S1D13700F01A100 Epson, S1D13700F01A100 Datasheet - Page 188

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S1D13700F01A100

Manufacturer Part Number
S1D13700F01A100
Description
Display Drivers LCD CONTROLLER
Manufacturer
Epson
Datasheet

Specifications of S1D13700F01A100

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFP
Pin Count
80
Mounting
Surface Mount
Operating Supply Voltage (min)
2.7V
Lead Free Status / Rohs Status
Supplier Unconfirmed

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6: TECHNICAL DESCRIPTION
6.2 ISA Bus Support
Display Adapter Card Support
VGA Display Adapter
Monochrome Display Adapter
Expanded Memory Manager Support
6.3 Non-ISA Bus Support
4-8
The S5U13705B00C board has been designed to directly support the 16-bit ISA bus environment
and can be used in conjunction with either a VGA or a monochrome display adapter card.
There are 4 configuration inputs associated with the Host Interface (CNF[2:0] and BS#). Refer to
“Table 2-3 Jumper Settings,” on page 4-2 and “Table 5-1 Host Bus Interface Pin Mapping,” on
page 4-6 for complete details.
When using the S5U13705B00C in conjunction with another primary Display Adapter (VGA or
Monochrome) the following applies:
All VGA display adapters can be used with the S5U13705B00C board if the S1D13705 is mapped
to the upper 1M Byte of ISA bus memory, address F00000-F1FFFF. If the S1D13705 is mapped to
the address range 0C0000-0D0000, then no VGA or VGA compatible display adapters can be used
with the S5U13705B00C board. See “6.1 Embedded Memory Support” on page 4-7.
The S5U13705B00C board can be used with monochrome display adapters at both memory
addresses.
If a memory manager is being used for system memory, the address range selected for the SRAM
start address must be excluded from use or memory conflicts will arise.
The S5U13705B00C board is specifically designed to support the standard 16-bit ISA bus. However,
the S1D13705 directly supports many other host bus interfaces. Header strips H1 and H2 are
provided and contain all the necessary IO pins to interface to these host buses. See “4 CPU/Bus
Interface Connector Pinouts” on page 4-4; “Table 2-1 Configuration DIP Switch Settings,” on
page 4-2; and “Table 2-3 Jumper Settings,” on page 4-2 for details.
When using the header strips to provide the bus interface observe the following:
• All signals on the ISA bus card edge must be isolated from the ISA bus (do not plug the card into
• U7, a PLD of type 22V10-15, is used to provide the S1D13705 CS# (pin 74) and other decoding
Note: When using a 3.3V host bus interface, IO V
a computer). Power must be provided through the headers.
logic signals for ISA bus mode. For non-ISA applications, this functionality must be provided
externally. Remove the PAL from its socket to eliminate conflicts driving S1D13705 control sig-
nals. Refer to Table 5-1 for connection details.
the 2-3 position. Refer to “Table 2-3 Jumper Settings,” on page 4-2.
EPSON
DD
must be set to 3.3V by setting jumper (JP1) to
S5U13705B00C REV. 1.0 ISA BUS EVALUATION
BOARD USER’S MANUAL (X27A-G-005-01)

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