S1D13700F01A100 Epson, S1D13700F01A100 Datasheet - Page 135

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S1D13700F01A100

Manufacturer Part Number
S1D13700F01A100
Description
Display Drivers LCD CONTROLLER
Manufacturer
Epson
Datasheet

Specifications of S1D13700F01A100

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFP
Pin Count
80
Mounting
Surface Mount
Operating Supply Voltage (min)
2.7V
Lead Free Status / Rohs Status
Supplier Unconfirmed

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10: SAMPLE CODE
2-50
** Register 02h: Mode Register 1 - 8BPP
*/
SET_REG(0x02, 0xC0);
/*
** Register 03h: Mode Register 2 - Normal power mode
*/
SET_REG(0x03, 0x03);
/*
** Register 04h: Horizontal Panel Size - 320 pixels - (320/8)-1 = 39 = 27h
*/
SET_REG(0x04, 0x27);
/*
** Register 05h: Vertical Panel Size LSB - 240 pixels
** Register 06h: Vertical Panel Size MSB - (240 - 1) = 239 = EFh
*/
SET_REG(0x05, 0xEF);
SET_REG(0x06, 0x00);
/*
** Register 07h - FPLINE Start Position - not used by STN
*/
SET_REG(0x07, 0x00);
/*
** Register 08h - Horizontal Non-Display Period = (Reg[08] + 4) * 8
**
**
**
**
**
**
**
*/
SET_REG(0x08, 0x00);
/*
** Register 09h - FPFRAME Start Position - not used by STN
*/
SET_REG(0x09, 0x00);
/*
** Register 0Ah - Vertical Non-Display Register = 3 lines
**
**
*/
SET_REG(0x0A, 0x03);
/*
** Register 0Bh - MOD Rate - not used by this panel
*/
SET_REG(0x0B, 0x00);
/*
** Register 0Ch - Screen 1 Start Word Address LSB
** Register 0Dh - Screen 1 Start Word Address MSB
**
*/
SET_REG(0x0C, 0x00);
SET_REG(0x0D, 0x00);
/*
** Register 0Eh - Screen 2 Start Word Address LSB
** Register 0Fh - Screen 2 Start Word Address MSB
**
*/
SET_REG(0x0E, 0x00);
SET_REG(0x0F, 0x00);
SET_REG(0x10, 0x00); /* Screen1/Screen2 Start Address High bits. */
/*
** Register 11h - Memory Address Offset
**
- HNDP and VNDP are calculated to achieve the
- Calculated in conjunction with register 08h (HNDP) to
- Start address should be set to 0
- Set this start address to 0 too
- Used for setting memory to a width greater than the
Frame Rate = ---------------------------
desired frame rate according to:
achieve the desired frame rate.
EPSON
(HDP + HNDP) * (VDP + VNDP)
PCLK
= (0+4) * 8 = 32 pels
S1D13705F00A PROGRAMMING NOTES
AND EXAMPLES (X27A-G-002-01)

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