PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 86

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC

PIC18C801-I/L

Manufacturer Part Number
PIC18C801-I/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C801-I/L

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
47
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18C801-I/LR
PIC18C801-I/LR
PIC18C801I/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C801-I/L
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC18C801-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18C601/801
7.1
Example 7-1 shows the sequence to perform an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 7-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s most significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 7-1:
EXAMPLE 7-2:
Example 7-3 shows the sequence to perform a 16 x 16
unsigned multiply. Equation 7-1 shows the algorithm
that is used. The 32-bit result is stored in 4 registers
RES3:RES0.
EQUATION 7-1:
DS39541A-page 86
MOVFF
MULWF
MOVFF
MULWF
BTFSC
SUBWF
MOVFF
BTFSC
SUBWF
RES3:RES0
Operation
ARG1, WREG
ARG2
ARG1, WREG
ARG2
ARG2, SB
PRODH
ARG2, WREG
ARG1, SB
PRODH
=
=
ARG1H:ARG1L
(ARG1H
(ARG1H
(ARG1L
(ARG1L
8 x 8 UNSIGNED
MULTIPLY ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
;
; ARG1 * ARG2 ->
;
ARG2H
ARG2L
ARG2H
ARG2L)
PRODH:PRODL
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
ARG2H:ARG2L
2
2
2
16
8
8
)+
)+
)+
- ARG1
- ARG2
Advance Information
EXAMPLE 7-3:
Example 7-4 shows the sequence to perform a 16 x 16
signed multiply. Equation 7-2 shows the algorithm
used. The 32-bit result is stored in four registers,
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pairs’ most significant bit (MSb)
is tested and the appropriate subtractions are done.
EQUATION 7-2:
;
;
;
RES3:RES0
MOVFF
MULWF
MOVFF
MOVFF
MOVFF
MULWF
MOVFF
MOVFF
MOVFF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
MOVFF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
=
=
ARG1H:ARG1L
(ARG1H
(ARG1H
(ARG1L
(ARG1L
(-1
(-1
ARG1L, WREG
ARG2L
PRODH, RES1
PRODL, RES0
ARG1H, WREG
ARG2H
PRODH, RES3
PRODL, RES2
ARG1L, WREG
ARG2H
PRODL, W
RES1
PRODH, W
RES2
WREG
RES3
ARG1H, WREG
ARG2L
PRODL, W
RES1
PRODH, W
RES2
WREG
RES3
ARG2H<7>
ARG1H<7>
ARG2H
ARG2L
ARG2H
ARG2L)
16 x 16 UNSIGNED
MULTIPLY ROUTINE
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
ARG2H:ARG2L
2001 Microchip Technology Inc.
2
2
2
ARG1H:ARG1L
ARG2H:ARG2L
16
8
8
)
)
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
)
+
+
+
+
2
2
16
16
)
)
+

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