PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 120

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
FIGURE 9-15:
TABLE 9-13:
TABLE 9-14:
DS39541A-page 120
Legend: ST = Schmitt Trigger input
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTG.
MEMCON
PORTG
RG3/WRH
TRISG
RG2/WRL
Name
RG0/ALE
RG4/BA0
LATG
RG1/OE
Note 1: I/O pins have diode protection to V
Name
PORTG Data Direction Control Register
Read PORTG pin/Write PORTG Data Latch
Read PORTG Data Latch/Write PORTG Data Latch
System Bus
EBDIS
Bit 7
PORTG FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
Bit#
bit0
bit1
bit2
bit3
bit4
Control
PORTG BLOCK DIAGRAM IN SYSTEM BUS MODE
PGRM
Bit 6
Buffer Type
RD PORTG
Data Bus
WR LATG
or
PORTG
WR TRISG
Control Out
External Enable
Drive System
ST
ST
ST
ST
ST
WAIT1
Bit 5
Input/output port pin or Address Latch Enable signal for external memory
Input/output port pin or Output Enable signal for external memory
Input/output port pin or Write Low byte signal for external memory
Input/output port pin or Write High byte signal for external memory
Input/output port pin or Byte Address 0 signal for external memory
TRIS Latch
Data Latch
Advance Information
RD LATG
D
D
DD
CK
CK
RD TRISG
and V
WAIT0
Bit 4
Q
Q
SS
Q
.
Bit 3
EN
—
Data
Port
EN
D
0
1
Bit 2
—
WM1 WM0
Bit 1
Function
Bit 0
I/O pin
---1 1111
---x xxxx
---x xxxx
0000 --00
Value on:
2001 Microchip Technology Inc.
POR,
BOR
(1)
Value on all
---1 1111
---u uuuu
---u uuuu
0000 --00
RESETS
other