PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 54

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
TABLE 4-2:
DS39541A-page 54
FFFh
FFEh
FFDh
FFCh
FFBh
FFAh
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FF0h
FEFh
FEEh
FEDh
FECh
FEBh
FEAh
FE9h
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
FE2h
FE1h
FE0h
FDFh
FDEh
FDDh
FDCh
FDBh
FDAh
FD9h
FD8h
Legend
Note 1: Other (non-power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset.
File Name
2: These registers can only be modified when the Combination Lock is open.
3: These registers are available on PIC18C801 only.
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved
REGISTER FILE SUMMARY - PIC18C601/801
Top-of-Stack High Byte (TOS<15:8>)
Top-of-Stack Low Byte (TOS<7:0>)
Holding Register for PC<15:8>
PC Low Byte (PC<7:0>)
Program Memory Table Pointer High Byte (TBLPTR<15:8>)
Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
Program Memory Table Latch
Product Register High Byte
Product Register Low Byte
Uses contents of FSR0 to address data memory - value of FSR0 not changed (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-decremented
(not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented
(not a physical register)
Uses contents of FSR0 to address data memory -value of FSR0 offset by WREG
(not a physical register)
Indirect Data Memory Address Pointer 0 Low Byte
Working Register
Uses contents of FSR1 to address data memory - value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-incremented
(not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-decremented
(not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 offset by WREG (not a physical register)
Indirect Data Memory Address Pointer 1 Low Byte
Uses contents of FSR2 to address data memory - value of FSR2 not changed (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 post-incremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 post-decremented
(not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register)
Uses contents of FSR2 to address data memory -value of FSR2 offset by WREG (not a physical register)
Indirect Data Memory Address Pointer 2 Low Byte
GIE/GIEH
STKOVF
INT2P
RBPU
Bit 7
—
—
—
—
—
—
—
—
PEIE/GIEL
INTEDG0
STKUNF
INT1P
Bit 6
—
—
—
—
—
—
—
—
INTEDG1
TMR0IE
Bit 5
—
—
—
—
—
—
—
—
—
Advance Information
r
Top-of-Stack Upper Byte (TOS<20:16>)
Return Stack Pointer
Holding Register for PC<20:16>
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)
INTEDG2
INT2E
INT0E
Bit 4
—
—
—
—
N
Indirect Data Memory Address Pointer 0 High
Indirect Data Memory Address Pointer 1 High
Bank Select Register
Indirect Data Memory Address Pointer 2 High
INT1E
RBIE
Bit 3
OV
—
TMR0IF
Bit 2
T0IP
—
Z
INT0F
INT2F
Bit 1
DC
—
2001 Microchip Technology Inc.
INT1F
RBIF
RBIP
Bit 0
C
---0 0000 ---0 0000
0000 0000 0000 0000
0000 0000 0000 0000
00-0 0000 00-0 0000
---0 0000 ---0 0000
0000 0000 0000 0000
0000 0000 0000 0000
--r0 0000 --r0 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 000x 0000 000u
1111 -1-1 1111 -1-1
11-0 0-00 11-0 0-00
---- xxxx ---- uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---- xxxx ---- uuuu
xxxx xxxx uuuu uuuu
---- 0000 ---- 0000
---- xxxx ---- uuuu
xxxx xxxx uuuu uuuu
---x xxxx ---u uuuu
Value on
POR
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
RESETS
Value on
all other
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
(1)