PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 142

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
14.1
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
14.2
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
TABLE 14-1:
TABLE 14-2:
DS39541A-page 142
CCPx Mode CCPy Mode
Compare
Capture
Capture
PWM
PWM
PWM
CCP Mode
Compare
CCP1 Module
CCP2 Module
Capture
PWM
Compare
Compare
Compare
Capture
Capture
CCP MODE - TIMER
RESOURCE
INTERACTION OF TWO CCP MODULES
PWM
or TMR3, depending upon which time-base is used.
The compare(s) could be configured for the special event trigger, which clears TMR1 or
TMR3, depending upon which time-base is used.
None.
TMR1 or TMR3 time-base. Time-base can be different for each CCP.
The compare could be configured for the special event trigger, which clears either TMR1
The PWMs will have the same frequency and update rate (TMR2 interrupt).
None.
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2
Advance Information
14.3
In Capture mode, CCPR1H:CCPR1L captures the 16-bit
value of the TMR1 or TMR3 registers, when an event
occurs on pin RC2/CCP1. An event is defined as:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR registers) is set. It
must be cleared in software. If another capture occurs
before the value in register CCPR1 is read, the old cap-
tured value will be lost.
14.3.1
In Capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
14.3.2
The timers used with the capture feature (either Timer1
and/or Timer3) must be running in Timer mode or Syn-
chronized Counter mode. In Asynchronous Counter
mode, the capture operation may not work. The timer
used with each CCP module is selected in the T3CON
register.
Note:
Interaction
Capture Mode
If the RC2/CCP1 is configured as an out-
put, a write to the port can cause a capture
condition.
CCP PIN CONFIGURATION
TIMER1/TIMER3 MODE SELECTION
2001 Microchip Technology Inc.