PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 141

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

14.0
Each CCP (Capture/Compare/PWM) module contains
a 16-bit register that can operate as a 16-bit capture
register, as a 16-bit compare register, or as a PWM
Duty Cycle register. Table 14-1 shows the timer
resources of the CCP module modes.
REGISTER 14-1:
CCP2CON
CCP1CON
2001 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULES
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER
CCP2CON REGISTER
bit 7
bit 7
Unimplemented: Read as '0'
DCxB1:DCxB0: PWM Duty Cycle bit1 and bit0
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs (bit1 and bit0) of the 10-bit PWM duty cycle. The upper eight bits
(DCx9:DCx2) of the duty cycle are found in CCPRxL.
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets CCPx module)
0001 = Reserved
0010 = Compare mode, toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode,
1001 = Compare mode,
1010 = Compare mode,
1011 = Compare mode,
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR
U-0
U-0
—
—
Initialize CCP pin High, on compare match force CCP pin Low (CCPIF bit is set)
Initialize CCP pin Low, on compare match force CCP pin High (CCPIF bit is set)
Generate software interrupt on compare match
(CCPIF bit is set, CCP pin is unaffected)
Trigger special event (CCPIF bit is set, reset TMR1 or TMR3)
U-0
U-0
—
—
Advance Information
DC1B1
DC2B1
R/W-0
R/W-0
W = Writable bit
’1’ = Bit is set
DC1B0
DC2B0
R/W-0
R/W-0
The operation of CCP1 is identical to that of CCP2, with
the exception of the special event trigger. Therefore,
operation of a CCP module in the following sections is
described, with respect to CCP1.
Table 14-2 shows the interaction of the CCP modules.
Register 14-1 shows the CCPx Control registers
(CCPxCON). For the CCP1 module, the register is
called CCP1CON and for the CCP2 module, the regis-
ter is called CCP2CON.
CCP1M3
CCP2M3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
R/W-0
PIC18C601/801
CCP1M2
CCP2M2
R/W-0
R/W-0
x = Bit is unknown
CCP1M1
CCP2M1
R/W-0
R/W-0
DS39541A-page 141
CCP1M0
CCP2M0
R/W-0
R/W-0
bit 0
bit 0