UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 406
![8BIT UC, 32K FLASH, 1KB RAM, LCD](/photos/19/0/190032/ge48lqfp05-40_sml.jpg)
UPD78F0413GA-GAM-AX
Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet
1.UPD78F0413GA-GAM-AX.pdf
(562 pages)
Specifications of UPD78F0413GA-GAM-AX
Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal
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15.8 Supplying LCD Drive Voltages V
resistance division method or external resistance division method.
15.8.1 Internal resistance division method
voltage divider resistors, a LCD drive power supply that meet each bias method listed in Table 15-9 can be generated,
without using external voltage divider resistors.
406
LCD Drive Voltage Pin
V
V
V
V
LC0
LC1
LC2
LC3
With the 78K0/LC3, a LCD drive power supply can be generated using either of two types of methods: internal
The 78K0/LC3 incorporates voltage divider resistors for generating LCD drive power supplies. Using internal
Note For the 1/2 bias method, it is necessary to connect the V
Figure 15-23 shows examples of generating LCD drive voltages internally according to Table 15-9.
Remark
Figure 15-23. Examples of LCD Drive Power Connections (Internal Resistance Division Method) (1/2)
(a) 1/3 bias method and static display mode
(example of V
It is recommended to use the external resistance division method when using the static display mode, in
order to reduce power consumed by the voltage divider resistor.
(MDSET1, MDSET0 = 0, 1)
SCOC
Table 15-9. LCD Drive Voltages (with On-Chip Voltage Divider Resistors)
P40/KR0
V
V
V
Bias Method
V
LC0
LC1
LC2
SS
DD
V
LC0
= 5 V, V
= V
DD
P-ch
R
R
R
LC0
CHAPTER 15 LCD CONTROLLER/DRIVER
No Bias (Static)
= 5 V)
V
V
V
V
P40/KR0
V
DD
LC0
LC1
LC2
SS
2
3
1
3
LC0
V
V
User’s Manual U18698EJ1V0UD
LCD
V
V
SS
LCD
LCD
, V
LC1
, V
LC2
1/2 Bias Method
and V
1
2
V
V
(b) 1/3 bias method and static display mode
V
LCD
LCD
SS
LC1
LC3
Note
and V
(example of V
SCOC
(MDSET1, MDSET0 = 1, 1)
LC2
P40/KR0
pins externally.
1/3 Bias Method
V
V
V
V
LC0
LC1
LC2
SS
V
2
3
1
3
LC0
V
V
DD
LCD
V
V
=
SS
LCD
LCD
3
5
= 5 V, V
P-ch
2R
R
R
R
V
DD
LC0
V
V
V
V
P40/KR0
V
DD
LC0
LC1
LC2
SS
1/4 Bias Method
= 3 V)
V
3
4
2
4
1
4
LCD
V
V
V
LCD
LCD
LCD
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