UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 34

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

2.2.7 P120 to P124 (port 12)
external interrupt request input, potential input for external low-voltage detection, resonator for main system clock
connection, resonator for subsystem clock connection, and external clock input. The following operation modes can
be specified in 1-bit units.
(1) Port mode
2.2.8 P140 to P143 (port 14)
LCD controller/driver. Either I/O port function or segment signal output function can be selected using port function
register ALL (PFALL).
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(2) Control mode
P120 functions as a 1-bit I/O port. P121 to P124 function as a 4-bit input port. These pins also function as pins for
P140 to P143 function as a 4-bit I/O port. These pins also function as pins for segment signal output pins for the
(a) SEG6, SEG7
(b) RxD6
(c) TxD6
P120 functions as a 1-bit I/O port and P121 to P124 function as a 4-bit I/O port. Only for P120, can be set to
input or output port using port mode register 12 (PM12). Only for P120, use of an on-chip pull-up resistor can be
specified by pull-up resistor option register 12 (PU12).
P120 to P124 function as external interrupt request input, potential input for external low-voltage detection,
resonator for main system clock connection, resonator for subsystem clock connection, and external clock input.
(a) INTP0
(b) EXLVI
(c) X1, X2
(d) EXCLK
(e) XT1, XT2
These pins are the segment signal output pins for the LCD controller/driver.
This is a serial data input pin of serial interface UART6.
This is a serial data output pin of serial interface UART6.
This functions as an external interrupt request input (INTP0) for which the valid edge (rising edge, falling
edge, or both rising and falling edges) can be specified.
This is a potential input pin for external low-voltage detection.
These are the pins for connecting a resonator for main system clock.
This is an external clock input pin for main system clock.
These are the pins for connecting a resonator for subsystem clock.
Remark X1 and X2 can be used as on-chip debug mode setting pins (OCD0A, OCD0B) when the on-chip
debug function is used. For detail, see CHAPTER 25 ON-CHIP DEBUG FUNCTION.
CHAPTER 2 PIN FUNCTIONS
User’s Manual U18698EJ1V0UD