UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 141

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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5.6.9 Conditions before clock oscillation is stopped
conditions before the clock oscillation is stopped.
Internal high-speed
oscillation clock
X1 clock
External main system clock
XT1 clock
Caution When switching the internal high-speed oscillation clock to the high-speed system clock, bit 2
Remarks 1. The number of clocks listed in Table 5-8 is the number of main system clocks before switchover.
The following lists the register flag settings for stopping the clock oscillation (disabling external clock input) and
Clock
(XSEL) of MCM must be set to 1 in advance. The value of XSEL can be changed only once after a
reset release.
2. Calculate the number of clocks in Table 5-8 by removing the decimal portion.
Set Value Before Switchover
Table 5-9. Conditions Before the Clock Oscillation Is Stopped and Flag Settings
Example When switching the main system clock from the internal high-speed oscillation clock to the
Table 5-8. Maximum Time Required for Main System Clock Switchover
MCM0
0
1
high-speed system clock (@ oscillation with f
MCS = 1 or CLS = 1
(The CPU is operating on a clock other than the internal high-speed
oscillation clock)
MCS = 0 or CLS = 1
(The CPU is operating on a clock other than the high-speed system clock)
CLS = 0
(The CPU is operating on a clock other than the subsystem clock)
1 + 2f
RH
/f
XH
Conditions Before Clock Oscillation Is Stopped
= 1 + 2
CHAPTER 5 CLOCK GENERATOR
1 + 2f
User’s Manual U18698EJ1V0UD
(External Clock Input Disabled)
XH
/f
8/10 = 1 + 2
RH
clock
0
Set Value After Switchover
0.8 = 1 + 1.6 = 2.6
MCM0
RH
= 8 MHz, f
1 + 2f
RH
/f
XH
XH
clock
= 10 MHz)
2 clocks
1
RSTOP = 1
MSTOP = 1
OSCSELS = 0
Flag Settings of SFR
Register
141

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