UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 211

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(2) Cautions for input enable control for TI52 pin
(3) Cautions for 16-bit timer/event counter 00 count up during external 24-bit event counter operation
<When starting operation>
<Overflow of higher timer>
The input enable control signal (TMH2 output signal) for the TI52 pin is synchronized by the TI52 pin input clock,
as described in Figure 6-54
Operation Timing of External 24-bit Event Counter. Thus, when the counter is operated as an external event
counter, an error up to one count may be caused.
16-bit timer/event counter 00 has an internal synchronization circuit to eliminate noise when starting operation,
and the first clock immediately after operation start is not counted.
When using the counter as a 24-bit counter, by setting 16-bit timer/event counter 00 and 8-bit timer/event counter
52 as the higher and lower timer and connecting them in cascade, the interrupt request flag of 8-bit timer/event
counter 52 which is the lower timer must be checked as described below, in order to accurately read the 24-bit
count values.
This phenomenon of 16-bit timer/event counter 00 occurs only when operation is started. A count delay will not
occur when 16-bit timer/event counter 00 overflows and the count is restarted from 0000H, since synchronization
has already been implemented.
- If TMIF52 = 1 when TM52 and TM00 are read:
- If TMIF52 = 0 when TM52 and TM00 are read:
TM52
TM00
when timer operation is started
TMIF52
TM52
TM00
The actual TM00 count value is “read value of TM00 + 1”.
The read value is the correct value.
FFFFH
FFH
0000H
00H
Overflow
0000H
00H
0000H
01H
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
0000H
01H
0000H
Configuration Diagram of External 24-bit Event Counter and Figure 6-55
02H
User’s Manual U18698EJ1V0UD
0000H
FFH
0000H
FFH
The timer does not count up
upon the first overflow of TM52.
The timer counts up as normal
upon an overflow of TM00.
0001H
00H
0000H
00H
0001H
01H
0000H
01H
0001H
FFH
0000H
FFH
The timer counts up upon second
and subsequent overflows.
0002H
00H
0001H
00H
0002H
01H
0001H
01H
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