UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 247

8BIT UC, 32K FLASH, 1KB RAM, LCD

UPD78F0413GA-GAM-AX

Manufacturer Part Number
UPD78F0413GA-GAM-AX
Description
8BIT UC, 32K FLASH, 1KB RAM, LCD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0413GA-GAM-AX

Controller Family/series
UPD78F
No. Of I/o's
30
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
32KB
Oscillator Type
External, Internal

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8-bit timer counter Hn
<1> The count operation is enabled by setting the TMHEn bit to 1. The count clock starts counting no more than
<2> When the value of the 8-bit timer counter Hn matches the value of the CMP0n register, the value of the timer
<3> If the TMHEn bit is cleared to 0 while timer H is operating, the INTTMHn signal and TOHn output are set to
Remarks 1. n = 0 to 2, however, TOH0 and TOH1 only for TOHn
Count clock
1 clock after the operation is enabled.
counter is cleared, and the level of the TOHn output is inverted. In addition, the INTTMHn signal is output at
the rising edge of the count clock.
the default level. If they are already at the default level before the TMHEn bit is cleared to 0, then that level
is maintained.
INTTMHn
CMP0n
TMHEn
2. 01H
TOHn
Figure 8-12. Timing of Interval Timer/Square-Wave Output Operation (1/2)
<1>
N
00H
Count start
FEH
(a) Basic operation (Operation When 01H
01H
CHAPTER 8 8-BIT TIMERS H0, H1, AND H2
User’s Manual U18698EJ1V0UD
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
N
<2>
Clear
00H
01H
Interval time
CMP0n
FEH)
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
<2>
Clear
00H
01H 00H
<3>
247

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