AFS600-FGG256 Actel, AFS600-FGG256 Datasheet - Page 105

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-FGG256

Manufacturer Part Number
AFS600-FGG256
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-FGG256

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
119
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Figure 2-70 • Analog Quad Direct Digital Input Configuration
Off-Chip
On-Chip
Pads
Direct Digital Input
The AV, AC, and AT pads can also be configured as high-voltage digital inputs
pads are 12 V–tolerant, the digital input can also be up to 12 V. However, the frequency at which these
pads can operate is limited to 10 MHz.
To enable one of these analog input pads to operate as a digital input, its corresponding Digital Input
Enable (DENAxy) pin on the Analog Block must be pulled High, where x is either V, C, or T (for AV, AC,
or AT pads, respectively) and y is in the range 0 to 9, corresponding to the appropriate Analog Quad.
When the pad is configured as a digital input, the signal will come out of the Analog Block macro on the
appropriate DAxOUTy pin, where x represents the pad type (V for AV pad, C for AC pad, or T for AT pad)
and y represents the appropriate Analog Quad number. Example: If the AT pad in Analog Quad 5 is
configured as a digital input, it will come out on the DATOUT5 pin of the Analog Block macro.
AV
Prescaler
Digital
Input
Monitor Block
Voltage
(DAVOUTx)
To FPGA
To Analog MUX
Monitor / Instr
AC
Prescaler
Amplifier
Digital
Current
Input
Monitor Block
(DACOUTx)
Current
To FPGA
Analog Quad
To Analog MUX
R e v i s i o n 1
From FPGA
Gate Driver
MOSFET
(GDONx)
Power
AG
Driver
Gate
Actel Fusion Family of Mixed Signal FPGAs
AT
Temperature
Digital
Input
Prescaler
Monitor
(Figure
Monitor Block
Temperature
(DATOUTx)
To FPGA
2-70). As these
To Analog MUX
2- 89

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