ATMEGA1284PR231-AU Atmel, ATMEGA1284PR231-AU Datasheet - Page 40

BUNDLE ATMEGA1284P/RF231 TQFP

ATMEGA1284PR231-AU

Manufacturer Part Number
ATMEGA1284PR231-AU
Description
BUNDLE ATMEGA1284P/RF231 TQFP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA1284PR231-AU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details
8. Power Management and Sleep Modes
8.1
8.2
8059D–AVR–11/09
Overview
Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
Figure 7-1 on page 27
tribution. The figure is helpful in selecting an appropriate sleep mode.
different sleep modes, their wake up sources and BOD disable ability.
Table 8-1.
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Sleep Mode
Idle
ADCNRM
Power-down
Power-save
Standby
Extended
Standby
”BOD Disable” on page 41
1. Only recommended with external crystal or resonator selected as clock source.
2. If either LCD controller or Timer/Counter2 is running in asynchronous mode.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
presents the different clock systems in the ATmega1284P, and their dis-
X
X
X
for more details.
X
X
X
X
(2)
Oscillators
X
X
X
X
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
X
X
X
X
X
X
Wake-up Sources
X
Table 8-2 on page 45
X
X
X
(2)
ATmega1284P
X
X
Table 8-1
X
X
X
X
X
X
X
X
shows the
X
for a
X
X
X
X
40

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