ATMEGA1284PR231-AU Atmel, ATMEGA1284PR231-AU Datasheet - Page 238

BUNDLE ATMEGA1284P/RF231 TQFP

ATMEGA1284PR231-AU

Manufacturer Part Number
ATMEGA1284PR231-AU
Description
BUNDLE ATMEGA1284P/RF231 TQFP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA1284PR231-AU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details
20.3
20.3.1
20.3.2
8059D–AVR–11/09
Register Description
ADCSRB – ADC Control and Status Register B
ACSR – Analog Comparator Control and Status Register
Table 20-1.
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar-
ator. When bandgap reference is used as input to the Analog Comparator, it will take a certain
time for the voltage to stabilize. If not stabilized, the first conversion may give wrong value. See
”Internal Voltage Reference” on page
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.
Bit
(0x7B)
Read/Write
Initial Value
Bit
0x30 (0x50)
Read/Write
Initial Value
ACME
1
1
1
1
1
1
1
Analog Comparator Mulitiplexed Input
ACD
R/W
R
7
0
7
0
ADEN
0
0
0
0
0
0
0
ACBG
ACME
R/W
R/W
”Analog Comparator Multiplexed Input” on page
6
0
6
0
ACO
N/A
MUX2..0
R
5
R
5
0
001
010
011
100
101
110
111
52.
R/W
ACI
4
0
R
4
0
Analog Comparator Negative Input
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
MUX5
ACIE
R/W
R/W
3
0
3
0
ADTS2
ACIC
R/W
R/W
2
0
2
0
ATmega1284P
ADTS1
ACIS1
R/W
R/W
1
0
1
0
237.
ADTS0
ACIS0
R/W
R/W
0
0
0
0
ADCSRB
ACSR
238

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