ATMEGA1284PR231-AU Atmel, ATMEGA1284PR231-AU Datasheet - Page 376

• Manufacturer Part Number: ATMEGA1284PR231-AU
• Description: BUNDLE ATMEGA1284P/RF231 TQFP
• Manufacturer: Atmel

Specifications of ATMEGA1284PR231-AU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Development Tools By Supplier: ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power - Output: -
• Operating Temperature: -
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

8059D–AVR–11/09
17 USART ................................................................................................... 171
18 USART in SPI Mode ............................................................................. 198
19 2-wire Serial Interface .......................................................................... 207
20 AC - Analog Comparator ..................................................................... 237
16.4Data Modes .........................................................................................................166
16.5Register Description ............................................................................................168
17.1Features ..............................................................................................................171
17.2USART1 and USART0 ........................................................................................171
17.3Overview .............................................................................................................171
17.4Clock Generation .................................................................................................172
17.5Frame Formats ....................................................................................................175
17.6USART Initialization ............................................................................................176
17.7Data Transmission – The USART Transmitter ....................................................177
17.8Data Reception – The USART Receiver .............................................................180
17.9Asynchronous Data Reception ............................................................................184
17.10Multi-processor Communication Mode ..............................................................187
17.11Register Description ..........................................................................................189
17.12Examples of Baud Rate Setting ........................................................................194
18.1Features ..............................................................................................................198
18.2Overview .............................................................................................................198
18.3Clock Generation .................................................................................................198
18.4SPI Data Modes and Timing ...............................................................................199
18.5Frame Formats ....................................................................................................199
18.6Data Transfer ......................................................................................................201
18.7AVR USART MSPIM vs. AVR SPI ......................................................................203
18.8Register Description ............................................................................................204
19.1Features ..............................................................................................................207
19.22-wire Serial Interface Bus Definition ..................................................................207
19.3Data Transfer and Frame Format ........................................................................208
19.4Multi-master Bus Systems, Arbitration and Synchronization ...............................211
19.5Overview of the TWI Module ...............................................................................213
19.6Using the TWI ......................................................................................................215
19.7Transmission Modes ...........................................................................................218
19.8Multi-master Systems and Arbitration ..................................................................231
19.9Register Description ............................................................................................232
ATmega1284P
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