ATMEGA1284PR231-AU Atmel, ATMEGA1284PR231-AU Datasheet - Page 156

BUNDLE ATMEGA1284P/RF231 TQFP

ATMEGA1284PR231-AU

Manufacturer Part Number
ATMEGA1284PR231-AU
Description
BUNDLE ATMEGA1284P/RF231 TQFP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA1284PR231-AU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details
15.11.2
8059D–AVR–11/09
TCCR2B – Timer/Counter Control Register B
• Bits 1:0 – WGM21:0: Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 15-8.
Notes:
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2A output is
changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is implemented as a
strobe. Therefore it is the value present in the COM2A1:0 bits that determines the effect of the
forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2A as TOP.
The FOC2A bit is always read as zero.
Bit
(0xB1)
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX= 0xFF
2. BOTTOM= 0x00
WGM2
0
0
0
0
1
1
1
1
Waveform Generation Mode Bit Description
FOC2A
W
7
0
WGM1
0
0
1
1
0
0
1
1
FOC2B
W
6
0
WGM0
Table
0
1
0
1
0
1
0
1
R
5
0
15-8. Modes of operation supported by the Timer/Counter
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
”Modes of Operation” on page
R
4
0
WGM22
R/W
3
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
CS22
R/W
2
0
ATmega1284P
Update of
Immediate
Immediate
BOTTOM
BOTTOM
OCRx at
CS21
R/W
1
0
TOP
TOP
145).
CS20
R/W
0
0
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
TCCR2B
(1)(2)
156

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