ATMEGA1284PR231-AU Atmel, ATMEGA1284PR231-AU Datasheet - Page 220

BUNDLE ATMEGA1284P/RF231 TQFP

ATMEGA1284PR231-AU

Manufacturer Part Number
ATMEGA1284PR231-AU
Description
BUNDLE ATMEGA1284P/RF231 TQFP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA1284PR231-AU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details
Table 19-2.
8059D–AVR–11/09
Status Code
(TWSR)
Prescaler Bits
are 0
0x08
0x10
0x18
0x20
0x28
0x30
0x38
Status of the 2-wire Serial Bus
and 2-wire Serial Interface Hard-
ware
A START condition has been
transmitted
A repeated START condition
has been transmitted
SLA+W has been transmitted;
ACK has been received
SLA+W has been transmitted;
NOT ACK has been received
Data byte has been transmitted;
ACK has been received
Data byte has been transmitted;
NOT ACK has been received
Arbitration lost in SLA+W or data
bytes
Status codes for Master Transmitter Mode
This scheme is repeated until the last byte has been sent and the transfer is ended by generat-
ing a STOP condition or a repeated START condition. A STOP condition is generated by writing
the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
After a repeated START condition (state 0x10) the 2-wire Serial Interface can access the same
Slave again, or a new Slave without transmitting a STOP condition. Repeated START enables
the Master to switch between Slaves, Master Transmitter mode and Master Receiver mode with-
out losing control of the bus.
TWCR
value
TWCR
value
To/from TWDR
Load SLA+W
Load SLA+W or
Load SLA+R
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
TWINT
TWINT
1
1
Application Software Response
TWEA
TWEA
X
X
STA
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TWSTA
TWSTA
STO
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
To TWCR
TWINT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWSTO
TWSTO
1
0
TWEA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Next Action Taken by TWI Hardware
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+R will be transmitted;
Logic will switch to Master Receiver mode
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
2-wire Serial Bus will be released and not addressed
Slave mode entered
A START condition will be transmitted when the bus be-
comes free
TWWC
TWWC
X
X
TWEN
TWEN
ATmega1284P
1
1
0
0
TWIE
TWIE
X
X
220

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