ATMEGA1284PR231-AU Atmel, ATMEGA1284PR231-AU Datasheet - Page 132

• Manufacturer Part Number: ATMEGA1284PR231-AU
• Description: BUNDLE ATMEGA1284P/RF231 TQFP
• Manufacturer: Atmel

Specifications of ATMEGA1284PR231-AU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Development Tools By Supplier: ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power - Output: -
• Operating Temperature: -
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

8059D–AVR–11/09
Table 14-3 on page 132
the fast PWM mode.
Table 14-3.
Note:
Table 14-4 on page 132
the phase correct or the phase and frequency correct, PWM mode.
Table 14-4.
Note:
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes.
COMnA1/COMnB1
COMnA1/COMnB1
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set. In
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set.
0
0
1
1
0
0
1
1
this case the compare match is ignored, but the set or clear is done at BOTTOM.
“14.9.3” on page 123.
Section “14.9.4” on page 125.
Compare Output Mode, Fast PWM
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to
COMnA0/COMnB0
COMnA0/COMnB0
for more details.
0
1
0
1
0
1
0
1
Table 14-5 on page
for more details.
Description
Normal port operation, OCnA/OCnB disconnected.
WGMn3:0 = 14 or 15: Toggle OC1A on Compare
Match, OC1B disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OCnA/OCnB on Compare Match, set
OCnA/OCnB at BOTTOM (non-inverting mode)
Set OCnA/OCnB on Compare Match, clear
OCnA/OCnB at BOTTOM (inverting mode)
Description
Normal port operation, OCnA/OCnB disconnected.
WGMn3:0 = 9 or 11: Toggle OCnA on Compare
Match, OCnB disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OCnA/OCnB on Compare Match when up-
counting. Set OCnA/OCnB on Compare Match when
downcounting.
Set OCnA/OCnB on Compare Match when up-
counting. Clear OCnA/OCnB on Compare Match
when downcounting.
(1)
133. Modes of operation supported by the
(See Section “14.9” on page
ATmega1284P
See Section
122.).
See
132