ATA5771-DK1 Atmel, ATA5771-DK1 Datasheet - Page 164

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ATA5771-DK1

Manufacturer Part Number
ATA5771-DK1
Description
BOARD XMITTER FOR ATA5771 868MHZ
Manufacturer
Atmel
Type
Transmitterr
Datasheets

Specifications of ATA5771-DK1

Frequency
868MHz
Maximum Frequency
868 MHz
Supply Voltage (max)
4 V
Supply Voltage (min)
2 V
Supply Current
8.5 mA
Product
RF Development Tools
For Use With/related Products
ATA5771
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.22.4.4
4.22.5
4.22.5.1
164
Atmel ATA5771/73/74
Register Description
Programming Time for Flash when Using SPM
SPMCSR – Store Program Memory Control and Status Register
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. Keep the Atmel
2. Keep the AVR core in Power-down sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 4-55.
Note:
The Store Program Memory Control and Status Register contains the control bits needed to
control the Program memory operations.
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the Atmel ATtiny44V and always read as zero.
• Bit 4 – CTPB: Clear Temporary Page Buffer
If the CTPB bit is written while filling the temporary page buffer, the temporary page buffer will
be cleared and the data will be lost.
• Bit 3 – RFLB: Read Fuse and Lock Bits
An LPM instruction within three cycles after RFLB and SPMEN are set in the SPMCSR Regis-
ter, will read either the Lock bits or the Fuse bits (depending on Z0 in the Z-pointer) into the
destination register. See
page 163
Bit
0x37 (0x57)
Read/Write
Initial Value
Flash write (Page Erase, Page Write,
and write Lock bits by SPM)
voltage. This can be done by enabling the internal Brown-out Detector (BOD) if the
operating voltage matches the detection level. If not, an external low V
tion circuit can be used. If a reset occurs while a write operation is in progress, the
write operation will be completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
1. The min and max programming times is per individual operation.
for details.
SPM Programming Time
Symbol
R
7
0
®
AVR
Section 4.22.4.1 “EEPROM Write Prevents Writing to SPMCSR” on
®
R
6
0
RESET active (low) during periods of insufficient power supply
R
5
0
(1)
Min Programming Time
CTPB
R/W
4
0
3.7ms
RFLB
R/W
3
0
PGWRT
Table 4-55
R/W
2
0
Max Programming Time
PGERS
R/W
1
0
shows the typical pro-
CC
CC
. This will pre-
reset protec-
4.5ms
SPMEN
R/W
0
0
9137E–RKE–12/10
SPMCSR

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