HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 612

IC H8 MCU FLASH 128K 100QFP

HD64F3048BF25

Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048BF25

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
18.4
The registers * used to control the on-chip flash memory when enabled are shown in table 18.3.
Note: * Access is prohibited to lower 16 address bits H'FF43 to H'FF46 and H'FF48 to H'FF4F.
Table 18.3 Register Configuration
Register Name
Flash memory control register 1
Flash memory control register 2
Erase block register
RAM control register
Notes: 1. Lower 16 bits of the address.
18.5
18.5.1
Bit
Initial value
Read/Write
Note:
Rev. 3.00 Sep 27, 2006 page 584 of 872
REJ09B0325-0300
2. If the chip is in a mode in which the on-chip flash memory is disabled, a read will return
3. When a high level is input to the FWE pin, the initial value is H'80.
4. When a low level is input to the FWE pin, or if a high level is input and the SWE bit in
5. FLMCR1, FLMCR2, EBR, and RAMCR are 8-bit registers.
6. Bits 6 to 0 are reserved bits but are readable/writable.
* Determined by the state of the FWE pin.
Flash Memory Register Configuration
Flash Memory Register Descriptions
Flash Memory Control Register 1 (FLMCR1)
These bits are designed for the on-chip flash memory version and do not exist in the
on-chip mask ROM version.
In the on-chip mask ROM version, these bits always read 1, and writing is disabled.
H'00 and writes are invalid. Writes are also invalid when the FWE bit in FLMCR1 is not
set to 1.
FLMCR1 is 0, these registers are initialized to H'00.
Byte access must be used on these registers (do not use word or longword access).
FWE
— *
R
7
SWE
R/W
6
0
ESU
R/W
Abbreviation
FLMCR1 *
FLMCR2 *
EBR *
RAMCR *
5
0
5
5
PSU
R/W
5
5
4
0
R/W
R/W *
R/W *
R/W *
R/W
R/W
EV
3
0
2
2
2
*
6
Initial Value
H'00 *
H'00
H'00 *
H'F0
R/W
PV
2
0
3
4
R/W
E
1
0
Address *
H'FF40
H'FF41
H'FF42
H'FF47
R/W
P
0
0
1

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