HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 392

IC H8 MCU FLASH 128K 100QFP

HD64F3048BF25

Manufacturer Part Number
HD64F3048BF25
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048BF25

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 10 16-Bit Integrated Timer Unit (ITU)
Output compare timing: The compare match signal is generated in the last state in which TCNT
and the general register match (when TCNT changes from the matching value to the next value).
When the compare match signal is generated, the output value selected in TIOR is output at the
output compare pin (TIOCA or TIOCB). When TCNT matches a general register, the compare
match signal is not generated until the next counter clock pulse.
Figure 10.22 shows the output compare timing.
Input Capture Function
The TCNT value can be captured into a general register when a transition occurs at an input
capture/output compare pin (TIOCA or TIOCB). Capture can take place on the rising edge, falling
edge, or both edges. The input capture function can be used to measure pulse width or period.
Sample setup procedure for input capture: Figure 10.23 shows a sample procedure for setting
up input capture.
Rev. 3.00 Sep 27, 2006 page 364 of 872
REJ09B0325-0300
TCNT input
clock
TCNT
GR
Compare
match signal
TIOCA,
TIOCB
Figure 10.22 Output Compare Timing
N
N
N + 1

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