HD64F3048BF25 Renesas Electronics America, HD64F3048BF25 Datasheet - Page 104

• Manufacturer Part Number: HD64F3048BF25
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048BF25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 3 MCU Operating Modes
3.4.4
Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space. The initial bus mode after a reset is 16 bits, with 16-bit access
to all areas. If all areas are designated for 8-bit access in ABWCR, the bus mode switches to 8 bits.
A
address output.)
3.4.5
Ports 1, 2, and 5 can function as address pins A
address space, but following a reset they are input ports. To use ports 1, 2, and 5 as an address bus,
the corresponding bits in their data direction registers (P1DDR, P2DDR, and P5DDR) must be set
to 1. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is
designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
3.4.6
Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space, but following a reset they are input ports. To use ports 1, 2,
and 5 as an address bus, the corresponding bits in their data direction registers (P1DDR, P2DDR,
and P5DDR) must be set to 1. For A
A
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is
designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
3.4.7
This mode operates using the on-chip ROM, RAM, and internal I/O registers. All I/O ports are
available. Mode 7 supports a 1-Mbyte address space.
Rev. 3.00 Sep 27, 2006 page 76 of 872
REJ09B0325-0300
23
20
to A
is always used for address output.)
21
Mode 4
are valid when 0 is written in bits 7 to 5 of BRCR. (In this mode A
Mode 5
Mode 6
Mode 7
23
to A
21
output, clear bits 7 to 5 of BRCR to 0. (In this mode
19
to A
0
, permitting access to a maximum 1-Mbyte
23
23
to A
to A
0
0
, permitting access to a
, permitting access to a
20
is always used for