MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 97

IC MCU 33MHZ 128K FLASH 144-LQFP

MMC2107CFCAG33

Manufacturer Part Number
MMC2107CFCAG33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2107
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
72
Number Of Timers
2
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
Mcore
Device Core
MCORE
Device Core Size
32b
Frequency (max)
33MHz
Total Internal Ram Size
8KB
# I/os (max)
72
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Operating Supply Voltage (min)
2.7/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
MMC2107CFCAG33
Manufacturer:
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Quantity:
210
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Manufacturer:
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3.7.3.2 Reset Configuration Register
MMC2107 – Rev. 2.0
MOTOROLA
Address: 0x00c1_0004 and 0x00c1_0005
Reset:
Reset:
Read:
Write:
Read:
Write:
BMT[1:0] — Bus Monitor Timing Field
The reset configuration register (RCON) is a read-only register; writing
to RCON has no effect. At reset, RCON determines the default operation
of certain chip functions. All default functions defined by the RCON
values may be overridden during reset configuration only if the external
RCON pin is asserted.
The BMT field selects the timeout time for the bus monitor as shown
in
Table 3-2
Freescale Semiconductor, Inc.
RPLLSEL
For More Information On This Product,
Table
Bit 15
Bit 7
Figure 3-3. Reset Configuration Register (RCON)
0
0
1
1
Chip Configuration Module (CCM)
3-5.
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
RPLLREF
shows the read/write accessibility of these write-once bits.
Table 3-5. Bus Monitor Timeout Values
14
0
0
6
1
1
BMT[1:0]
00
01
10
11
RLOAD
13
0
0
5
0
0
12
0
0
4
0
0
BOOTPS
(in System Clocks)
11
Timeout Period
0
0
3
1
1
Chip Configuration Module (CCM)
BOOTSEL
64
32
16
8
Memory Map and Registers
10
0
0
2
0
0
9
0
0
1
0
0
Technical Data
MODE
Bit 8
Bit 0
0
0
0
0
97

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