MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 385

• Manufacturer Part Number: MMC2107CFCAG33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2107
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: Mcore
• Device Core: MCORE
• Device Core Size: 32b
• Frequency (max): 33MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 72
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Supply Voltage (min): 2.7/4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.7.8 SPI Port Data Direction Register
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Pin function:
Address: 0x00cb_0008
Reset:
Read: Anytime
Write: Anytime
RSVD[7:4] — Reserved
DDRSP[3:0] — Data Direction Bits
When the SPI is enabled (SPE = 1), the MISO, MOSI, and SCK pins:
Read:
Write:
Writing to these read/write bits updates their values but has no effect
on functionality.
The DDRSP[3:0] bits control the data direction of SPIPORT pins.
Reset clears DDRSP[3:0].
In slave mode, DDRSP3 has no meaning or effect. In master mode,
DDRSP3 determines whether SPI port pin 3 is a mode-fault input, a
general-purpose output, or a slave-select output.
•
•
Freescale Semiconductor, Inc.
Figure 17-9. SPI Port Data Direction Register (SPIDDR)
For More Information On This Product,
1 = Corresponding pin configured as output
0 = Corresponding pin configured as input
Are inputs if their SPI functions are input functions regardless of
the state of their DDRSP bits.
Are outputs if their SPI functions are output functions only if their
DDRSP bits are set.
RSVD7
Serial Peripheral Interface Module (SPI)
Bit 7
0
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RSVD6
6
0
RSVD5
5
0
RSVD4
4
0
Serial Peripheral Interface Module (SPI)
DDRSP3
SS
3
0
DDRSP2
Memory Map and Registers
SCK
2
0
DDRSP1
MOSI/
MOMI
1
0
Technical Data
DDRSP0
MISO/
SISO
Bit 0
0
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